[Mesa-dev] [PATCH 11/41] intel: Kill intel_mipmap_level::nr_images

Chad Versace chad.versace at linux.intel.com
Thu Nov 17 19:58:38 PST 2011


For all texture targets except GL_TEXTURE_CUBE_MAP, the 'nr_images' and
'depth' fields of intel_mipmap_level were identical.  In the exceptional
case, nr_images == 6 and depth == 1.

It is simple to determine if a texture is a cube or not, so the presence
of two fields here was not helpful. Worse, it was confusing. When we
eventually implement GL_ARB_texture_cube_map_array, this mess would have
become even more confusing.

This patch removes 'nr_images' and assigns to 'depth' a consistent
meaning: depth is the number of 2D slices at each miplevel.  The exact
semantics of depth varies according to the texture target:
   - For GL_TEXTURE_CUBE_MAP, depth is 6.
   - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
     identical for all miplevels in the texture.
   - For GL_TEXTURE_3D, it is the texture's depth at each miplevel. It's
     value, like width and height, varies with miplevel.
   - For other texture types, depth is 1.

As a consequence, parameters were removed from the following function
signatures:
    intel_miptree_set_level_info
        Remove 'nr_images'.

    i945_miptree_layout
    brw_miptree_layout_texture
    brw_miptree_layout_texture_array
        Remove 'slices'.

Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c      |   17 ++++-----
 src/mesa/drivers/dri/intel/intel_fbo.c          |   12 ++++---
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c  |   44 +++++++++++------------
 src/mesa/drivers/dri/intel/intel_mipmap_tree.h  |   18 +++++++---
 src/mesa/drivers/dri/intel/intel_tex_layout.c   |    4 +-
 src/mesa/drivers/dri/intel/intel_tex_layout.h   |    3 +-
 src/mesa/drivers/dri/intel/intel_tex_validate.c |    7 ++--
 7 files changed, 56 insertions(+), 49 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index d77bf4d..ac6ade6 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -41,8 +41,7 @@
 
 static void
 brw_miptree_layout_texture_array(struct intel_context *intel,
-				 struct intel_mipmap_tree *mt,
-				 int slices)
+				 struct intel_mipmap_tree *mt)
 {
    GLuint align_w;
    GLuint align_h;
@@ -58,14 +57,14 @@ brw_miptree_layout_texture_array(struct intel_context *intel,
    if (mt->compressed)
       qpitch /= 4;
 
-   i945_miptree_layout_2d(mt, slices);
+   i945_miptree_layout_2d(mt);
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      for (q = 0; q < slices; q++) {
+      for (q = 0; q < mt->depth0; q++) {
 	 intel_miptree_set_image_offset(mt, level, q, 0, q * qpitch);
       }
    }
-   mt->total_height = qpitch * slices;
+   mt->total_height = qpitch * mt->depth0;
 }
 
 void
@@ -82,7 +81,7 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
 	  * pitch of qpitch rows, where qpitch is defined by the equation given
 	  * in Volume 1 of the BSpec.
 	  */
-	 brw_miptree_layout_texture_array(intel, mt, 6);
+	 brw_miptree_layout_texture_array(intel, mt);
 	 break;
       }
       /* FALLTHROUGH */
@@ -117,7 +116,7 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
 	 GLint y = 0;
 	 GLint q, j;
 
-	 intel_miptree_set_level_info(mt, level, nr_images,
+	 intel_miptree_set_level_info(mt, level,
 				      0, mt->total_height,
 				      width, height, depth);
 
@@ -170,11 +169,11 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
 
    case GL_TEXTURE_2D_ARRAY:
    case GL_TEXTURE_1D_ARRAY:
-      brw_miptree_layout_texture_array(intel, mt, mt->depth0);
+      brw_miptree_layout_texture_array(intel, mt);
       break;
 
    default:
-      i945_miptree_layout_2d(mt, 1);
+      i945_miptree_layout_2d(mt);
       break;
    }
    DBG("%s: %dx%dx%d\n", __FUNCTION__,
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 9398dbd..8c41956 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -947,8 +947,9 @@ intel_framebuffer_renderbuffer(struct gl_context * ctx,
 
 static bool
 intel_update_wrapper(struct gl_context *ctx, struct intel_renderbuffer *irb, 
-		     struct gl_texture_image *texImage)
+		     struct gl_renderbuffer_attachment *att)
 {
+   struct gl_texture_image *texImage = _mesa_get_attachment_teximage(att);
    struct intel_texture_image *intel_image = intel_texture_image(texImage);
    int width, height, depth;
 
@@ -993,7 +994,8 @@ intel_update_wrapper(struct gl_context *ctx, struct intel_renderbuffer *irb,
  * This will have the region info needed for hardware rendering.
  */
 static struct intel_renderbuffer *
-intel_wrap_texture(struct gl_context * ctx, struct gl_texture_image *texImage)
+intel_wrap_texture(struct gl_context * ctx,
+		   struct gl_renderbuffer_attachment *att)
 {
    const GLuint name = ~0;   /* not significant, but distinct for debugging */
    struct intel_renderbuffer *irb;
@@ -1008,7 +1010,7 @@ intel_wrap_texture(struct gl_context * ctx, struct gl_texture_image *texImage)
    _mesa_init_renderbuffer(&irb->Base, name);
    irb->Base.ClassID = INTEL_RB_CLASS;
 
-   if (!intel_update_wrapper(ctx, irb, texImage)) {
+   if (!intel_update_wrapper(ctx, irb, att)) {
       free(irb);
       return NULL;
    }
@@ -1113,7 +1115,7 @@ intel_render_texture(struct gl_context * ctx,
       return;
    }
    else if (!irb) {
-      irb = intel_wrap_texture(ctx, image);
+      irb = intel_wrap_texture(ctx, att);
       if (irb) {
          /* bind the wrapper to the attachment point */
          _mesa_reference_renderbuffer(&att->Renderbuffer, &irb->Base);
@@ -1125,7 +1127,7 @@ intel_render_texture(struct gl_context * ctx,
       }
    }
 
-   if (!intel_update_wrapper(ctx, irb, image)) {
+   if (!intel_update_wrapper(ctx, irb, att)) {
        _mesa_reference_renderbuffer(&att->Renderbuffer, NULL);
        _swrast_render_texture(ctx, fb, att);
        return;
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 8f10101..8b9bd19 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -82,11 +82,17 @@ intel_miptree_create_internal(struct intel_context *intel,
    mt->last_level = last_level;
    mt->width0 = width0;
    mt->height0 = height0;
-   mt->depth0 = depth0;
    mt->cpp = compress_byte ? compress_byte : _mesa_get_format_bytes(mt->format);
    mt->compressed = compress_byte ? 1 : 0;
    mt->refcount = 1; 
 
+   if (target == GL_TEXTURE_CUBE_MAP) {
+      assert(depth0 == 1);
+      mt->depth0 = 6;
+   } else {
+      mt->depth0 = depth0;
+   }
+
 #ifdef I915
    (void) intel;
    if (intel->is_945)
@@ -287,7 +293,6 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt,
 void
 intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
 			     GLuint level,
-			     GLuint nr_images,
 			     GLuint x, GLuint y,
 			     GLuint w, GLuint h, GLuint d)
 {
@@ -296,15 +301,13 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
    mt->level[level].depth = d;
    mt->level[level].level_x = x;
    mt->level[level].level_y = y;
-   mt->level[level].nr_images = nr_images;
 
    DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __FUNCTION__,
        level, w, h, d, x, y);
 
-   assert(nr_images);
    assert(mt->level[level].slice == NULL);
 
-   mt->level[level].slice = malloc(nr_images * sizeof(*mt->level[0].slice));
+   mt->level[level].slice = malloc(d * sizeof(*mt->level[0].slice));
    mt->level[level].slice[0].x_offset = mt->level[level].level_x;
    mt->level[level].slice[0].y_offset = mt->level[level].level_y;
 }
@@ -318,7 +321,7 @@ intel_miptree_set_image_offset(struct intel_mipmap_tree *mt,
    if (img == 0 && level == 0)
       assert(x == 0 && y == 0);
 
-   assert(img < mt->level[level].nr_images);
+   assert(img < mt->level[level].depth);
 
    mt->level[level].slice[img].x_offset = mt->level[level].level_x + x;
    mt->level[level].slice[img].y_offset = mt->level[level].level_y + y;
@@ -335,23 +338,18 @@ intel_miptree_get_image_offset(struct intel_mipmap_tree *mt,
 			       GLuint level, GLuint face, GLuint depth,
 			       GLuint *x, GLuint *y)
 {
-   switch (mt->target) {
-   case GL_TEXTURE_CUBE_MAP_ARB:
-      *x = mt->level[level].slice[face].x_offset;
-      *y = mt->level[level].slice[face].y_offset;
-      break;
-   case GL_TEXTURE_3D:
-   case GL_TEXTURE_2D_ARRAY_EXT:
-   case GL_TEXTURE_1D_ARRAY_EXT:
-      assert(depth < mt->level[level].nr_images);
-      *x = mt->level[level].slice[depth].x_offset;
-      *y = mt->level[level].slice[depth].y_offset;
-      break;
-   default:
-      *x = mt->level[level].slice[0].x_offset;
-      *y = mt->level[level].slice[0].y_offset;
-      break;
+   int slice;
+
+   if (face > 0) {
+      assert(face < 6);
+      assert(depth == 0);
+      slice = face;
+   } else {
+      slice = depth;
    }
+
+   *x = mt->level[level].slice[slice].x_offset;
+   *y = mt->level[level].slice[slice].y_offset;
 }
 
 static void
@@ -429,7 +427,7 @@ intel_miptree_copy_teximage(struct intel_context *intel,
    struct intel_mipmap_tree *src_mt = intelImage->mt;
    int level = intelImage->base.Base.Level;
    int face = intelImage->base.Base.Face;
-   GLuint depth = src_mt->level[level].depth;
+   GLuint depth = intelImage->base.Base.Depth;
 
    for (int slice = 0; slice < depth; slice++) {
       intel_miptree_copy_slice(intel, dst_mt, src_mt, level, face, slice);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index 2cad793..8f0bc8d 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -69,16 +69,25 @@ struct intel_mipmap_level
    GLuint level_y;
    GLuint width;
    GLuint height;
-   /** Depth of the mipmap at this level: 1 for 1D/2D/CUBE, n for 3D. */
+
+   /**
+    * \brief Number of 2D slices in this miplevel.
+    *
+    * The exact semantics of depth varies according to the texture target:
+    *    - For GL_TEXTURE_CUBE_MAP, depth is 6.
+    *    - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is
+    *      identical for all miplevels in the texture.
+    *    - For GL_TEXTURE_3D, it is the texture's depth at this miplevel. It's
+    *      value, like width and height, varies with miplevel.
+    *    - For other texture types, depth is 1.
+    */
    GLuint depth;
-   /** Number of images at this level: 1 for 1D/2D, 6 for CUBE, depth for 3D */
-   GLuint nr_images;
 
    /**
     * \brief List of 2D images in this mipmap level.
     *
     * This may be a list of cube faces, array slices in 2D array texture, or
-    * layers in a 3D texture. The list's length is \c nr_images.
+    * layers in a 3D texture. The list's length is \c depth.
     */
    struct intel_mipmap_slice {
       /**
@@ -205,7 +214,6 @@ intel_miptree_get_dimensions_for_image(struct gl_texture_image *image,
 
 void intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
                                   GLuint level,
-                                  GLuint nr_images,
                                   GLuint x, GLuint y,
                                   GLuint w, GLuint h, GLuint d);
 
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index 64f4a70..e6324cf 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -50,7 +50,7 @@ intel_get_texture_alignment_unit(gl_format format,
    }
 }
 
-void i945_miptree_layout_2d(struct intel_mipmap_tree *mt, int nr_images)
+void i945_miptree_layout_2d(struct intel_mipmap_tree *mt)
 {
    GLuint align_h, align_w;
    GLuint level;
@@ -93,7 +93,7 @@ void i945_miptree_layout_2d(struct intel_mipmap_tree *mt, int nr_images)
    for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
       GLuint img_height;
 
-      intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
+      intel_miptree_set_level_info(mt, level, x, y, width,
 				   height, depth);
 
       img_height = ALIGN(height, align_h);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.h b/src/mesa/drivers/dri/intel/intel_tex_layout.h
index 257c07c..c6c865d 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.h
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.h
@@ -38,7 +38,6 @@ static INLINE GLuint minify( GLuint d )
    return MAX2(1, d>>1);
 }
 
-extern void i945_miptree_layout_2d(struct intel_mipmap_tree *mt,
-				   int nr_images);
+extern void i945_miptree_layout_2d(struct intel_mipmap_tree *mt);
 void intel_get_texture_alignment_unit(gl_format format,
 				      unsigned int *w, unsigned int *h);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c
index f4c1a68..8dad011 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_validate.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c
@@ -140,12 +140,13 @@ intel_tex_map_image_for_swrast(struct intel_context *intel,
    if (mt->target == GL_TEXTURE_3D ||
        mt->target == GL_TEXTURE_2D_ARRAY ||
        mt->target == GL_TEXTURE_1D_ARRAY) {
-      int i;
 
       /* ImageOffsets[] is only used for swrast's fetch_texel_3d, so we can't
        * share code with the normal path.
        */
-      for (i = 0; i < mt->level[level].depth; i++) {
+      assert(face == 0);
+      int depth = mt->level[level].depth;
+      for (int i = 0; i < depth; i++) {
 	 intel_miptree_get_image_offset(mt, level, face, i, &x, &y);
 	 intel_image->base.ImageOffsets[i] = x + y * mt->region->pitch;
       }
@@ -154,7 +155,7 @@ intel_tex_map_image_for_swrast(struct intel_context *intel,
 
       intel_image->base.Data = intel_region_map(intel, mt->region, mode);
    } else {
-      assert(mt->level[level].depth == 1);
+      assert(intel_image->base.Base.Depth == 1);
       intel_miptree_get_image_offset(mt, level, face, 0, &x, &y);
 
       DBG("%s: (%d,%d) -> (%d, %d)/%d\n",
-- 
1.7.7.1



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