[Mesa-dev] [PATCH 17/41] intel: Replace intel_mipmap_tree::hiz_region with a miptree
Chad Versace
chad.versace at linux.intel.com
Fri Nov 18 15:41:04 PST 2011
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
On 11/18/2011 03:24 PM, Eric Anholt wrote:
> On Thu, 17 Nov 2011 19:58:44 -0800, Chad Versace <chad.versace at linux.intel.com> wrote:
>> This is required to correctly implement HiZ for mipmapped and
>> multi-layered textures.
>>
>> Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
>> ---
>> src/mesa/drivers/dri/i965/brw_misc_state.c | 5 +++--
>> src/mesa/drivers/dri/intel/intel_context.c | 20 ++++++++++----------
>> src/mesa/drivers/dri/intel/intel_fbo.c | 11 +++--------
>> src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 19 ++++++++++++++++++-
>> src/mesa/drivers/dri/intel/intel_mipmap_tree.h | 22 +++++++++++++---------
>> 5 files changed, 47 insertions(+), 30 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
>> index 4119afa..17da460 100644
>> --- a/src/mesa/drivers/dri/i965/brw_misc_state.c
>> +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
>
>> @@ -1394,17 +1394,17 @@ intel_process_dri2_buffer_with_separate_stencil(struct intel_context *intel,
>> buffer->pitch / buffer->cpp,
>> buffer->name,
>> buffer_name);
>> -
>> + struct intel_mipmap_tree *mt =
>> + intel_miptree_create_for_region(intel,
>> + GL_TEXTURE_2D,
>> + rb->Base.Format,
>> + region);
>> + intel_region_release(®ion);
>> if (buffer->attachment == __DRI_BUFFER_HIZ) {
>> - intel_region_reference(&rb->mt->hiz_region, region);
>> + rb->mt->hiz_mt = mt;
>> } else {
>> - rb->mt = intel_miptree_create_for_region(intel,
>> - GL_TEXTURE_2D,
>> - rb->Base.Format,
>> - region);;
>> + rb->mt = mt;
>> }
>
> I don't see who would have already released preexisting rb->mt here.
Fixed that in v2 of this patch, in response to your refcount comments
on the earlier patch.
>
>> +bool
>> +intel_miptree_alloc_hiz(struct intel_context *intel,
>> + struct intel_mipmap_tree *mt)
>> +{
>> + assert(mt->hiz_mt == NULL);
>> + mt->hiz_mt = intel_miptree_create(intel,
>> + mt->target,
>> + MESA_FORMAT_X8_Z24,
>> + mt->first_level,
>> + mt->last_level,
>> + mt->width0,
>> + mt->height0,
>> + mt->depth0,
>> + true);
>> + return mt->hiz_mt != NULL;
>> +}
>
> We don't get any size reduction on the hiz miptree compared to the real
> miptree?
Yes and no.
No, because we always set LOD=0 and manually compute the draw offsets in
the SURFACE_STATE batch. The HiZ and stencil buffers inherit the draw
offset from 3DSTATE_DEPTH_BUFFER, so the HiZ and stencil miptree must have
identical layout to the depth miptree.
To save memory, we could waiver the identical-layout requirement and allocate
a small hiz and stencil miptrees for non-texture renderbuffers, since the draw
offsets will never be used in that case. But let's save that optimization for
a future patch.
Yes, we could allocate small hiz and stencil miptrees if (and that's a big if)
we used the LOD field in SURFACE_STATE. The hardware expects compact miptree
layout in that case.
An additional reason that we may want start using the LOD field is that, when
wrapping a renderbuffer around mipmapped or multi-layer depthstencil textures,
the stencil miptree layout will always be incorrect in the current way we do
things. We should discuss that problem f2f someday.
- ----
Chad Versace
chad.versace at linux.intel.com
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
iQIcBAEBAgAGBQJOxu0OAAoJEAIvNt057x8ifzkQAL0OL3YqG2fy5qgdbov6410q
Lp2fiQhV3LehacvFeOuSTNWgjjtoSY8dAcqu/WvDQJcrWYiizofQ1dtHD0f1Q0r1
AggSfGW7d1Srd+sV2+HOWMsOtU+b0ePhVgzWmmjfWGO9inLIpnLEU7P0n4zcLK/z
ZP4TSCW/lyqkFrP4X/M4HWiqEpzfcIfwNrPchSzBsiG8Ut17hcMRGeqUS8I3ubFa
WMBDtJtRVBVLyb2j45L5MikjrY3TaCkOa+7Vbj2W6IQ2QstHoqPkQSBbIwDpUGF2
sGHnGsmO1eHbTe5XrSFo0xCpMjVhIZZ3oH09aK1UfEDcVcSQb6BFsM2G0xBj8bFY
c72yY9DhdfTrX+IuVDn9u7F9mt6fO5w2lxZtMPjw4XC7CziElbne123qQMDYUyVh
IQ9kW1t9qLMQlduCjfTFLZUijUGQtf6JdoFr7em5Z4B0l1dpwdGyRI/5mYYzOqaG
/gfwIpT/meMTz3Xl5On/nN0zGdQ9CLZLOuHMerEIzuJVv7SCbiLeB195hrGCLbBe
ZE3yNMOMHOfqT4o5C5hmk/UWnsLYTKFXRdD2ZFrp9jkQ/isVkBVtVs/xgMUvLknL
+T9sIUGpi32gHL+Mw0qorApQN56C/yFxU72NS3gK1KefbNmI8WKCL+lz4KFYqds6
TUuGTo5LCt28iAS4V5qe
=S1Yx
-----END PGP SIGNATURE-----
More information about the mesa-dev
mailing list