[Mesa-dev] [PATCH] i915: Fix build since hiz merge.

Eric Anholt eric at anholt.net
Tue Nov 22 13:04:12 PST 2011


---

There are regressions that look hiz-related on gm45 as well.  On 915,
while this gets things building, it'still in bad shape.  Glean
pixelformats, for example, segfaults at:

759	      colorRegion = irb ? irb->mt->region : NULL;

of i915_vtbl.c.  Tossing in some assertion, it's that irb->mt is NULL.

 src/mesa/drivers/dri/i915/Makefile.sources    |    1 +
 src/mesa/drivers/dri/i915/i830_state.c        |    3 ++-
 src/mesa/drivers/dri/i915/i830_vtbl.c         |   19 ++++++++++---------
 src/mesa/drivers/dri/i915/i915_tex_layout.c   |   12 ++++++------
 src/mesa/drivers/dri/i915/i915_vtbl.c         |   17 +++++++++--------
 src/mesa/drivers/dri/i915/intel_resolve_map.c |    1 +
 6 files changed, 29 insertions(+), 24 deletions(-)
 create mode 120000 src/mesa/drivers/dri/i915/intel_resolve_map.c

diff --git a/src/mesa/drivers/dri/i915/Makefile.sources b/src/mesa/drivers/dri/i915/Makefile.sources
index c5b9c1f..d961c07 100644
--- a/src/mesa/drivers/dri/i915/Makefile.sources
+++ b/src/mesa/drivers/dri/i915/Makefile.sources
@@ -16,6 +16,7 @@ i915_C_SOURCES := \
 	intel_extensions.c \
 	intel_extensions_es.c \
 	intel_mipmap_tree.c \
+	intel_resolve_map.c \
 	intel_tex_layout.c \
 	intel_tex_image.c \
 	intel_tex_subimage.c \
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c
index 03af7bd..3136ced 100644
--- a/src/mesa/drivers/dri/i915/i830_state.c
+++ b/src/mesa/drivers/dri/i915/i830_state.c
@@ -37,6 +37,7 @@
 
 #include "intel_screen.h"
 #include "intel_batchbuffer.h"
+#include "intel_mipmap_tree.h"
 #include "intel_fbo.h"
 #include "intel_buffers.h"
 
@@ -848,7 +849,7 @@ i830Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
          if (ctx->DrawBuffer) {
             struct intel_renderbuffer *irbStencil
                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
-            hw_stencil = (irbStencil && irbStencil->region);
+            hw_stencil = (irbStencil && irbStencil->mt->region);
          }
          if (hw_stencil) {
             I830_STATECHANGE(i830, I830_UPLOAD_CTX);
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index d29f979..aa989e3 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -28,6 +28,7 @@
 #include "i830_context.h"
 #include "i830_reg.h"
 #include "intel_batchbuffer.h"
+#include "intel_mipmap_tree.h"
 #include "intel_regions.h"
 #include "intel_tris.h"
 #include "intel_fbo.h"
@@ -760,7 +761,7 @@ i830_update_draw_buffer(struct intel_context *intel)
 
        for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
            irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
-           colorRegions[i] = irb ? irb->region : NULL;
+           colorRegions[i] = irb ? irb->mt->region : NULL;
        }
    }
    else {
@@ -778,7 +779,7 @@ i830_update_draw_buffer(struct intel_context *intel)
 	 /* drawing to user-created FBO */
 	 struct intel_renderbuffer *irb;
 	 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]);
-	 colorRegions[0] = (irb && irb->region) ? irb->region : NULL;
+	 colorRegions[0] = (irb && irb->mt->region) ? irb->mt->region : NULL;
       }
    }
 
@@ -790,10 +791,10 @@ i830_update_draw_buffer(struct intel_context *intel)
    }
 
    /* Check for depth fallback. */
-   if (irbDepth && irbDepth->region) {
+   if (irbDepth && irbDepth->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, false);
-      depthRegion = irbDepth->region;
-   } else if (irbDepth && !irbDepth->region) {
+      depthRegion = irbDepth->mt->region;
+   } else if (irbDepth && !irbDepth->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, true);
       depthRegion = NULL;
    } else { /* !irbDepth */
@@ -803,10 +804,10 @@ i830_update_draw_buffer(struct intel_context *intel)
    }
 
    /* Check for stencil fallback. */
-   if (irbStencil && irbStencil->region) {
+   if (irbStencil && irbStencil->mt->region) {
       assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
-   } else if (irbStencil && !irbStencil->region) {
+   } else if (irbStencil && !irbStencil->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
    } else { /* !irbStencil */
       /* No fallback is needed because there is no stencil buffer. */
@@ -816,9 +817,9 @@ i830_update_draw_buffer(struct intel_context *intel)
    /* If we have a (packed) stencil buffer attached but no depth buffer,
     * we still need to set up the shared depth/stencil state so we can use it.
     */
-   if (depthRegion == NULL && irbStencil && irbStencil->region
+   if (depthRegion == NULL && irbStencil && irbStencil->mt->region
        && irbStencil->Base.Format == MESA_FORMAT_S8_Z24) {
-      depthRegion = irbStencil->region;
+      depthRegion = irbStencil->mt->region;
    }
 
    /*
diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
index a86384b..caa7127 100644
--- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -126,7 +126,7 @@ i915_miptree_layout_cube(struct intel_mipmap_tree * mt)
    mt->total_height = dim * 4;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 6,
+      intel_miptree_set_level_info(mt, level,
 				   0, 0,
 				   lvlWidth, lvlHeight,
 				   1);
@@ -167,7 +167,7 @@ i915_miptree_layout_3d(struct intel_mipmap_tree * mt)
 
    /* XXX: hardware expects/requires 9 levels at minimum. */
    for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
-      intel_miptree_set_level_info(mt, level, depth, 0, mt->total_height,
+      intel_miptree_set_level_info(mt, level, 0, mt->total_height,
 				   width, height, depth);
 
       stack_height += MAX2(2, height);
@@ -208,7 +208,7 @@ i915_miptree_layout_2d(struct intel_mipmap_tree * mt)
    mt->total_height = 0;
 
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 1,
+      intel_miptree_set_level_info(mt, level,
 				   0, mt->total_height,
 				   width, height, 1);
 
@@ -335,7 +335,7 @@ i945_miptree_layout_cube(struct intel_mipmap_tree * mt)
 
    /* Set all the levels to effectively occupy the whole rectangular region. */
    for (level = mt->first_level; level <= mt->last_level; level++) {
-      intel_miptree_set_level_info(mt, level, 6,
+      intel_miptree_set_level_info(mt, level,
 				   0, 0,
 				   lvlWidth, lvlHeight, 1);
       lvlWidth /= 2;
@@ -421,7 +421,7 @@ i945_miptree_layout_3d(struct intel_mipmap_tree * mt)
       GLint y = 0;
       GLint q, j;
 
-      intel_miptree_set_level_info(mt, level, depth,
+      intel_miptree_set_level_info(mt, level,
 				   0, mt->total_height,
 				   width, height, depth);
 
@@ -469,7 +469,7 @@ i945_miptree_layout(struct intel_mipmap_tree * mt)
    case GL_TEXTURE_1D:
    case GL_TEXTURE_2D:
    case GL_TEXTURE_RECTANGLE_ARB:
-      i945_miptree_layout_2d(mt, 1);
+      i945_miptree_layout_2d(mt);
       break;
    default:
       _mesa_problem(NULL, "Unexpected tex target in i945_miptree_layout()");
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 072a692..3caf8cc 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -41,6 +41,7 @@
 #include "swrast_setup/swrast_setup.h"
 
 #include "intel_batchbuffer.h"
+#include "intel_mipmap_tree.h"
 #include "intel_regions.h"
 #include "intel_tris.h"
 #include "intel_fbo.h"
@@ -755,15 +756,15 @@ i915_update_draw_buffer(struct intel_context *intel)
    } else {
       struct intel_renderbuffer *irb;
       irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]);
-      colorRegion = irb ? irb->region : NULL;
+      colorRegion = irb ? irb->mt->region : NULL;
       FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, false);
    }
 
    /* Check for depth fallback. */
-   if (irbDepth && irbDepth->region) {
+   if (irbDepth && irbDepth->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, false);
-      depthRegion = irbDepth->region;
-   } else if (irbDepth && !irbDepth->region) {
+      depthRegion = irbDepth->mt->region;
+   } else if (irbDepth && !irbDepth->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, true);
       depthRegion = NULL;
    } else { /* !irbDepth */
@@ -773,10 +774,10 @@ i915_update_draw_buffer(struct intel_context *intel)
    }
 
    /* Check for stencil fallback. */
-   if (irbStencil && irbStencil->region) {
+   if (irbStencil && irbStencil->mt->region) {
       assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
-   } else if (irbStencil && !irbStencil->region) {
+   } else if (irbStencil && !irbStencil->mt->region) {
       FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
    } else { /* !irbStencil */
       /* No fallback is needed because there is no stencil buffer. */
@@ -786,9 +787,9 @@ i915_update_draw_buffer(struct intel_context *intel)
    /* If we have a (packed) stencil buffer attached but no depth buffer,
     * we still need to set up the shared depth/stencil state so we can use it.
     */
-   if (depthRegion == NULL && irbStencil && irbStencil->region
+   if (depthRegion == NULL && irbStencil && irbStencil->mt->region
        && irbStencil->Base.Format == MESA_FORMAT_S8_Z24) {
-      depthRegion = irbStencil->region;
+      depthRegion = irbStencil->mt->region;
    }
 
    /*
diff --git a/src/mesa/drivers/dri/i915/intel_resolve_map.c b/src/mesa/drivers/dri/i915/intel_resolve_map.c
new file mode 120000
index 0000000..77e50fb
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_resolve_map.c
@@ -0,0 +1 @@
+../intel/intel_resolve_map.c
\ No newline at end of file
-- 
1.7.7.3



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