[Mesa-dev] [PATCH] i965: Set SURFACE_STATE vertical alignment bit on Ivybridge.

[Chad Versace]

On 11/23/2011 06:34 PM, Kenneth Graunke wrote:
> See intel_vertical_texture_alignment_unit() in intel_tex_layout.c;
> certain surface types require setting this to VALIGN_4.
> 
> Analogous to commit dd0e46c4102976b7d317104ecd1bb565ac34613a on Gen6.
> 
> Fixes piglit test fbo-generatemipmap-formats with the
> GL_ARB_depth_texture and GL_EXT_packed_depth_stencil arguments.
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> v2: Do what Chad said
> 
> Good call.  No difference in piglit compared to the first, but a good idea
> nonetheless.

Reviewed-by: Chad Versace <chad.versace at linux.intel.com>

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Chad Versace
chad.versace at linux.intel.com