[Mesa-dev] [PATCH 5/6] mesa: Make gl_program::InputsRead 64 bits.
Eric Anholt
eric at anholt.net
Sun Nov 27 13:08:48 PST 2011
On Sun, 27 Nov 2011 18:18:57 +0100, Mathias Fröhlich <Mathias.Froehlich at gmx.net> wrote:
> Make gl_program::InputsRead a 64 bits bitfield.
> Adapt the intel and radeon driver to handle a 64 bits
> InputsRead value.
>
> Signed-off-by: Mathias Froehlich <Mathias.Froehlich at web.de>
> @@ -373,10 +373,10 @@ static void brw_prepare_vertices(struct brw_context
> *brw)
> /* Accumulate the list of enabled arrays. */
> brw->vb.nr_enabled = 0;
> while (vs_inputs) {
> - GLuint i = ffs(vs_inputs) - 1;
> + GLuint i = _mesa_ffsll(vs_inputs) - 1;
This should just be "ffsll". If the a platform lacks ffsll, we should
be just defining ffsll on that platform instead of making up a new name
for it for everyone.
> @@ -207,7 +207,7 @@ do_vs_prog(struct brw_context *brw,
>
> if (c.key.copy_edgeflag) {
> c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
> - c.prog_data.inputs_read |= 1<<VERT_ATTRIB_EDGEFLAG;
> + c.prog_data.inputs_read |= BITFIELD64_BIT(VERT_ATTRIB_EDGEFLAG);
> }
Let's just use VERT_BIT_EDGEFLAG.
(when I was looking at this, I counted up _BIT_ vs (1 << _ATTRIB_), and
there was a clear preference for using _BIT_ defines when available).
> /* BRW_NEW_FRAGMENT_PROGRAM */
> - if (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
> + if (fp->program.Base.InputsRead & BITFIELD64_BIT(FRAG_ATTRIB_WPOS))
FRAG_BIT_WPOS
> dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
> if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
> dw5 |= GEN6_WM_COMPUTED_DEPTH;
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c
> b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> index f38d2f1..3775301 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> @@ -58,7 +58,7 @@ upload_wm_state(struct brw_context *brw)
> dw1 |= GEN7_WM_POLYGON_STIPPLE_ENABLE;
>
> /* BRW_NEW_FRAGMENT_PROGRAM */
> - if (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
> + if (fp->program.Base.InputsRead & BITFIELD64_BIT(FRAG_ATTRIB_WPOS))
> dw1 |= GEN7_WM_USES_SOURCE_DEPTH | GEN7_WM_USES_SOURCE_W;
> if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
> writes_depth = true;
same
> @@ -560,10 +569,10 @@ static GLboolean r200_translate_vertex_program(struct
> gl_context *ctx, struct r2
> /* will always find one due to limited array_count */
> if (free_inputs & (1 << j)) {
> free_inputs &= ~(1 << j);
> - vp->inputs[i] = j;
> - if (j == 0) vp->inputmap_rev[j] = i; /* mapped to pos */
> - else if (j < 12) vp->inputmap_rev[j + 2] = i; /* mapped to col/tex
> */
> - else vp->inputmap_rev[j + 1] = i; /* mapped to pos1 */
> + vp->inputs[VERT_ATTRIB_GENERIC(i)] = j;
> + if (j == 0) vp->inputmap_rev[j] = VERT_ATTRIB_GENERIC(i); /*
> mapped to pos */
> + else if (j < 12) vp->inputmap_rev[j + 2] = VERT_ATTRIB_GENERIC(i);
> /* mapped to col/tex */
> + else vp->inputmap_rev[j + 1] = VERT_ATTRIB_GENERIC(i); /* mapped
> to pos1 */
> break;
Correct change, but yuck, that "if" sequence sure needs some newlines in
there.
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> index 74b8fa7..7d1be5e 100644
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -3731,7 +3731,7 @@ get_pixel_transfer_visitor(struct st_fragment_program
> *fp,
> inst->sampler = 0;
> inst->tex_target = TEXTURE_2D_INDEX;
>
> - prog->InputsRead |= (1 << FRAG_ATTRIB_TEX0);
> + prog->InputsRead |= BITFIELD64_BIT(FRAG_ATTRIB_TEX0);
> @@ -3855,7 +3855,7 @@ get_bitmap_visitor(struct st_fragment_program *fp,
> inst->sampler = samplerIndex;
> inst->tex_target = TEXTURE_2D_INDEX;
>
> - prog->InputsRead |= (1 << FRAG_ATTRIB_TEX0);
> + prog->InputsRead |= BITFIELD64_BIT(FRAG_ATTRIB_TEX0);
> prog->SamplersUsed |= (1 << samplerIndex); /* mark sampler as used */
> v->samplers_used |= (1 << samplerIndex);
FRAG_BIT_TEX0 for these two?
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