[Mesa-dev] [PATCH 1/2] i965: store hw_prim info in brw context

[Yuanhan Liu]

Store hw_prim info in brw context for other references. This patch is
mainly for the next patch.

Signed-off-by: Yuanhan Liu <yuanhan.liu at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_context.h |    1 +
 src/mesa/drivers/dri/i965/brw_draw.c    |   17 +++++++----------
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 69821d9..267608b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -515,6 +515,7 @@ struct brw_context
 {
    struct intel_context intel;  /**< base class, must be first field */
    GLuint primitive;
+   uint32_t hw_prim;
 
    GLboolean emit_state_always;
    GLboolean has_surface_tile_offset;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index bdb5b67..3865887 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -128,8 +128,7 @@ static GLuint trim(GLenum prim, GLuint length)
 
 
 static void brw_emit_prim(struct brw_context *brw,
-			  const struct _mesa_prim *prim,
-			  uint32_t hw_prim)
+			  const struct _mesa_prim *prim)
 {
    struct intel_context *intel = &brw->intel;
    int verts_per_instance;
@@ -168,7 +167,7 @@ static void brw_emit_prim(struct brw_context *brw,
 
    BEGIN_BATCH(6);
    OUT_BATCH(CMD_3D_PRIM << 16 | (6 - 2) |
-	     hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
+	     brw->hw_prim << GEN4_3DPRIM_TOPOLOGY_TYPE_SHIFT |
 	     vertex_access_type);
    OUT_BATCH(verts_per_instance);
    OUT_BATCH(start_vertex_location);
@@ -185,8 +184,7 @@ static void brw_emit_prim(struct brw_context *brw,
 }
 
 static void gen7_emit_prim(struct brw_context *brw,
-			   const struct _mesa_prim *prim,
-			   uint32_t hw_prim)
+			   const struct _mesa_prim *prim)
 {
    struct intel_context *intel = &brw->intel;
    int verts_per_instance;
@@ -225,7 +223,7 @@ static void gen7_emit_prim(struct brw_context *brw,
 
    BEGIN_BATCH(7);
    OUT_BATCH(CMD_3D_PRIM << 16 | (7 - 2));
-   OUT_BATCH(hw_prim | vertex_access_type);
+   OUT_BATCH(brw->hw_prim | vertex_access_type);
    OUT_BATCH(verts_per_instance);
    OUT_BATCH(start_vertex_location);
    OUT_BATCH(1); // instance count
@@ -318,7 +316,6 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
    intel_prepare_render(intel);
 
    for (i = 0; i < nr_prims; i++) {
-      uint32_t hw_prim;
       int estimated_max_prim_size;
 
       estimated_max_prim_size = 512; /* batchbuffer commands */
@@ -335,7 +332,7 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
        */
       intel_batchbuffer_require_space(intel, estimated_max_prim_size, false);
 
-      hw_prim = brw_set_prim(brw, &prim[i]);
+      brw->hw_prim = brw_set_prim(brw, &prim[i]);
       if (brw->state.dirty.brw) {
 	 brw_validate_state(brw);
 
@@ -371,9 +368,9 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx,
       }
 
       if (intel->gen >= 7)
-	 gen7_emit_prim(brw, &prim[i], hw_prim);
+	 gen7_emit_prim(brw, &prim[i]);
       else
-	 brw_emit_prim(brw, &prim[i], hw_prim);
+	 brw_emit_prim(brw, &prim[i]);
 
       intel->no_batch_wrap = GL_FALSE;
 
-- 
1.7.4.4