[Mesa-dev] [PATCH 6/6] r600g: rename r600_resource_texture to r600_texture
Marek Olšák
maraeo at gmail.com
Mon Aug 13 18:50:59 PDT 2012
---
src/gallium/drivers/r600/compute_memory_pool.c | 6 ++--
.../drivers/r600/evergreen_compute_internal.c | 4 +--
src/gallium/drivers/r600/evergreen_state.c | 8 ++---
src/gallium/drivers/r600/r600_blit.c | 20 ++++++------
src/gallium/drivers/r600/r600_pipe.h | 6 ++--
src/gallium/drivers/r600/r600_resource.h | 6 ++--
src/gallium/drivers/r600/r600_state.c | 6 ++--
src/gallium/drivers/r600/r600_state_common.c | 6 ++--
src/gallium/drivers/r600/r600_texture.c | 34 ++++++++++----------
9 files changed, 48 insertions(+), 48 deletions(-)
diff --git a/src/gallium/drivers/r600/compute_memory_pool.c b/src/gallium/drivers/r600/compute_memory_pool.c
index 187dc84..c4f4459 100644
--- a/src/gallium/drivers/r600/compute_memory_pool.c
+++ b/src/gallium/drivers/r600/compute_memory_pool.c
@@ -41,12 +41,12 @@
#include "compute_memory_pool.h"
#include "evergreen_compute_internal.h"
-static struct r600_resource_texture * create_pool_texture(struct r600_screen * screen,
+static struct r600_texture * create_pool_texture(struct r600_screen * screen,
unsigned size_in_dw)
{
struct pipe_resource templ;
- struct r600_resource_texture * tex;
+ struct r600_texture * tex;
if (size_in_dw == 0) {
return NULL;
@@ -62,7 +62,7 @@ static struct r600_resource_texture * create_pool_texture(struct r600_screen * s
templ.depth0 = 1;
templ.array_size = 1;
- tex = (struct r600_resource_texture *)r600_texture_create(
+ tex = (struct r600_texture *)r600_texture_create(
&screen->screen, &templ);
/* XXX: Propagate this error */
assert(tex && "Out of memory");
diff --git a/src/gallium/drivers/r600/evergreen_compute_internal.c b/src/gallium/drivers/r600/evergreen_compute_internal.c
index a8b76a6..29e5630 100644
--- a/src/gallium/drivers/r600/evergreen_compute_internal.c
+++ b/src/gallium/drivers/r600/evergreen_compute_internal.c
@@ -497,8 +497,8 @@ void evergreen_set_tex_resource(
{
struct evergreen_compute_resource* res =
get_empty_res(pipe, COMPUTE_RESOURCE_TEX, id);
- struct r600_resource_texture *tmp =
- (struct r600_resource_texture*)view->base.texture;
+ struct r600_texture *tmp =
+ (struct r600_texture*)view->base.texture;
unsigned format, endian;
uint32_t word4 = 0, yuv_format = 0, pitch = 0;
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index d8bfc0c..5b10d0c 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -993,7 +993,7 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte
{
struct r600_screen *rscreen = (struct r600_screen*)ctx->screen;
struct r600_pipe_sampler_view *view = CALLOC_STRUCT(r600_pipe_sampler_view);
- struct r600_resource_texture *tmp = (struct r600_resource_texture*)texture;
+ struct r600_texture *tmp = (struct r600_texture*)texture;
unsigned format, endian;
uint32_t word4 = 0, yuv_format = 0, pitch = 0;
unsigned char swizzle[4], array_mode = 0, tile_type = 0;
@@ -1246,7 +1246,7 @@ void evergreen_init_color_surface(struct r600_context *rctx,
struct r600_surface *surf)
{
struct r600_screen *rscreen = rctx->screen;
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)surf->base.texture;
+ struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
struct pipe_resource *pipe_tex = surf->base.texture;
unsigned level = surf->base.u.tex.level;
unsigned pitch, slice;
@@ -1420,7 +1420,7 @@ static void evergreen_init_depth_surface(struct r600_context *rctx,
{
struct r600_screen *rscreen = rctx->screen;
struct pipe_screen *screen = &rscreen->screen;
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)surf->base.texture;
+ struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
uint64_t offset;
unsigned level, pitch, slice, format, array_mode;
unsigned macro_aspect, tile_split, bankh, bankw, nbanks;
@@ -1679,7 +1679,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
surf->cb_color_attrib, res, RADEON_USAGE_READWRITE);
}
/* set CB_COLOR1_INFO for possible dual-src blending */
- if (i == 1 && !((struct r600_resource_texture*)res)->is_rat) {
+ if (i == 1 && !((struct r600_texture*)res)->is_rat) {
r600_pipe_state_add_reg_bo(rstate, R_028C70_CB_COLOR0_INFO + 1 * 0x3C,
surf->cb_color_info, res, RADEON_USAGE_READWRITE);
i++;
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index 8bc7648..a577d3a 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -128,15 +128,15 @@ static unsigned u_max_sample(struct pipe_resource *r)
}
void r600_blit_uncompress_depth(struct pipe_context *ctx,
- struct r600_resource_texture *texture,
- struct r600_resource_texture *staging,
+ struct r600_texture *texture,
+ struct r600_texture *staging,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned last_sample)
{
struct r600_context *rctx = (struct r600_context *)ctx;
unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
- struct r600_resource_texture *flushed_depth_texture = staging ?
+ struct r600_texture *flushed_depth_texture = staging ?
staging : texture->flushed_depth_texture;
const struct util_format_description *desc =
util_format_description(texture->resource.b.b.format);
@@ -226,14 +226,14 @@ void r600_flush_depth_textures(struct r600_context *rctx,
while (depth_texture_mask) {
struct pipe_sampler_view *view;
- struct r600_resource_texture *tex;
+ struct r600_texture *tex;
i = u_bit_scan(&depth_texture_mask);
view = &textures->views[i]->base;
assert(view);
- tex = (struct r600_resource_texture *)view->texture;
+ tex = (struct r600_texture *)view->texture;
assert(tex->is_depth && !tex->is_flushing_texture);
r600_blit_uncompress_depth(&rctx->context, tex, NULL,
@@ -247,7 +247,7 @@ static void r600_copy_first_sample(struct pipe_context *ctx,
const struct pipe_resolve_info *info)
{
struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_resource_texture *rsrc = (struct r600_resource_texture*)info->src.res;
+ struct r600_texture *rsrc = (struct r600_texture*)info->src.res;
struct pipe_surface *dst_view, dst_templ;
struct pipe_sampler_view src_templ, *src_view;
struct pipe_box box;
@@ -471,7 +471,7 @@ static void r600_compressed_to_blittable(struct pipe_resource *tex,
unsigned level,
struct texture_orig_info *orig)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)tex;
+ struct r600_texture *rtex = (struct r600_texture*)tex;
unsigned pixsize = util_format_get_blocksize(rtex->resource.b.b.format);
int new_format;
int new_height, new_width;
@@ -506,7 +506,7 @@ static void r600_change_format(struct pipe_resource *tex,
struct texture_orig_info *orig,
enum pipe_format format)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)tex;
+ struct r600_texture *rtex = (struct r600_texture*)tex;
orig->format = tex->format;
orig->width0 = tex->width0;
@@ -523,7 +523,7 @@ static void r600_reset_blittable_to_orig(struct pipe_resource *tex,
unsigned level,
struct texture_orig_info *orig)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)tex;
+ struct r600_texture *rtex = (struct r600_texture*)tex;
tex->format = orig->format;
tex->width0 = orig->width0;
@@ -543,7 +543,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
const struct pipe_box *src_box)
{
struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_resource_texture *rsrc = (struct r600_resource_texture*)src;
+ struct r600_texture *rsrc = (struct r600_texture*)src;
struct texture_orig_info orig_info[2];
struct pipe_box sbox;
const struct pipe_box *psbox = src_box;
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index aeff528..d5e0ecb 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -484,8 +484,8 @@ void r600_copy_buffer(struct pipe_context *ctx, struct
struct pipe_resource *src, const struct pipe_box *src_box);
void r600_init_blit_functions(struct r600_context *rctx);
void r600_blit_uncompress_depth(struct pipe_context *ctx,
- struct r600_resource_texture *texture,
- struct r600_resource_texture *staging,
+ struct r600_texture *texture,
+ struct r600_texture *staging,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned last_sample);
@@ -546,7 +546,7 @@ void r600_init_surface_functions(struct r600_context *r600);
uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
const unsigned char *swizzle_view,
uint32_t *word4_p, uint32_t *yuv_format_p);
-unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
+unsigned r600_texture_get_offset(struct r600_texture *rtex,
unsigned level, unsigned layer);
/* r600_translate.c */
diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index 80041a3..3497ca9 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -42,7 +42,7 @@ struct r600_resource_global {
struct compute_memory_item *chunk;
};
-struct r600_resource_texture {
+struct r600_texture {
struct r600_resource resource;
unsigned array_mode[PIPE_MAX_TEXTURE_LEVELS];
@@ -52,7 +52,7 @@ struct r600_resource_texture {
bool is_depth;
bool is_rat;
unsigned dirty_db_mask; /* each bit says if that miplevel is dirty */
- struct r600_resource_texture *flushed_depth_texture;
+ struct r600_texture *flushed_depth_texture;
boolean is_flushing_texture;
struct radeon_surface surface;
};
@@ -109,7 +109,7 @@ static INLINE struct r600_resource *r600_resource(struct pipe_resource *r)
bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
struct pipe_resource *texture,
- struct r600_resource_texture **staging);
+ struct r600_texture **staging);
/* r600_texture.c texture transfer functions. */
struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index b4f61a4..d2ef68e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -979,7 +979,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
const struct pipe_sampler_view *state)
{
struct r600_pipe_sampler_view *view = CALLOC_STRUCT(r600_pipe_sampler_view);
- struct r600_resource_texture *tmp = (struct r600_resource_texture*)texture;
+ struct r600_texture *tmp = (struct r600_texture*)texture;
unsigned format, endian;
uint32_t word4 = 0, yuv_format = 0, pitch = 0;
unsigned char swizzle[4], array_mode = 0, tile_type = 0;
@@ -1199,7 +1199,7 @@ static void r600_set_viewport_state(struct pipe_context *ctx,
static void r600_init_color_surface(struct r600_context *rctx,
struct r600_surface *surf)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)surf->base.texture;
+ struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
unsigned level = surf->base.u.tex.level;
unsigned pitch, slice;
unsigned color_info;
@@ -1347,7 +1347,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
static void r600_init_depth_surface(struct r600_context *rctx,
struct r600_surface *surf)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)surf->base.texture;
+ struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
unsigned level, pitch, slice, format, offset, array_mode;
level = surf->base.u.tex.level;
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 393d81b..a512dad 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -573,8 +573,8 @@ void r600_set_sampler_views(struct r600_context *rctx,
}
if (rviews[i]) {
- struct r600_resource_texture *rtex =
- (struct r600_resource_texture*)rviews[i]->base.texture;
+ struct r600_texture *rtex =
+ (struct r600_texture*)rviews[i]->base.texture;
if (rtex->is_depth && !rtex->is_flushing_texture) {
dst->views.depth_texture_mask |= 1 << i;
@@ -1203,7 +1203,7 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
/* Set the depth buffer as dirty. */
if (rctx->framebuffer.zsbuf) {
struct pipe_surface *surf = rctx->framebuffer.zsbuf;
- struct r600_resource_texture *rtex = (struct r600_resource_texture *)surf->texture;
+ struct r600_texture *rtex = (struct r600_texture *)surf->texture;
rtex->dirty_db_mask |= 1 << surf->u.tex.level;
}
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index 7cb1d5f..ac49038 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -58,7 +58,7 @@ static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600
0, &sbox);
}
-unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
+unsigned r600_texture_get_offset(struct r600_texture *rtex,
unsigned level, unsigned layer)
{
return rtex->surface.level[level].offset +
@@ -158,7 +158,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
}
static int r600_setup_surface(struct pipe_screen *screen,
- struct r600_resource_texture *rtex,
+ struct r600_texture *rtex,
unsigned pitch_in_bytes_override)
{
struct pipe_resource *ptex = &rtex->resource.b.b;
@@ -206,7 +206,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
struct pipe_resource *ptex,
struct winsys_handle *whandle)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
+ struct r600_texture *rtex = (struct r600_texture*)ptex;
struct r600_resource *resource = &rtex->resource;
struct radeon_surface *surface = &rtex->surface;
struct r600_screen *rscreen = (struct r600_screen*)screen;
@@ -230,7 +230,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
static void r600_texture_destroy(struct pipe_screen *screen,
struct pipe_resource *ptex)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
+ struct r600_texture *rtex = (struct r600_texture*)ptex;
struct r600_resource *resource = &rtex->resource;
if (rtex->flushed_depth_texture)
@@ -252,7 +252,7 @@ static const struct u_resource_vtbl r600_texture_vtbl =
NULL /* transfer_inline_write */
};
-static struct r600_resource_texture *
+static struct r600_texture *
r600_texture_create_object(struct pipe_screen *screen,
const struct pipe_resource *base,
unsigned pitch_in_bytes_override,
@@ -260,12 +260,12 @@ r600_texture_create_object(struct pipe_screen *screen,
boolean alloc_bo,
struct radeon_surface *surface)
{
- struct r600_resource_texture *rtex;
+ struct r600_texture *rtex;
struct r600_resource *resource;
struct r600_screen *rscreen = (struct r600_screen*)screen;
int r;
- rtex = CALLOC_STRUCT(r600_resource_texture);
+ rtex = CALLOC_STRUCT(r600_texture);
if (rtex == NULL)
return NULL;
@@ -408,11 +408,11 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
struct pipe_resource *texture,
- struct r600_resource_texture **staging)
+ struct r600_texture **staging)
{
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
+ struct r600_texture *rtex = (struct r600_texture*)texture;
struct pipe_resource resource;
- struct r600_resource_texture **flushed_depth_texture = staging ?
+ struct r600_texture **flushed_depth_texture = staging ?
staging : &rtex->flushed_depth_texture;
if (!staging && rtex->flushed_depth_texture)
@@ -433,7 +433,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
if (staging)
resource.flags |= R600_RESOURCE_FLAG_TRANSFER;
- *flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
+ *flushed_depth_texture = (struct r600_texture *)ctx->screen->resource_create(ctx->screen, &resource);
if (*flushed_depth_texture == NULL) {
R600_ERR("failed to create temporary texture to hold flushed depth\n");
return false;
@@ -457,7 +457,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
const struct pipe_box *box)
{
struct r600_context *rctx = (struct r600_context*)ctx;
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
+ struct r600_texture *rtex = (struct r600_texture*)texture;
struct pipe_resource resource;
struct r600_transfer *trans;
boolean use_staging_texture = FALSE;
@@ -503,7 +503,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
*/
/* XXX: when discard is true, no need to read back from depth texture
*/
- struct r600_resource_texture *staging_depth;
+ struct r600_texture *staging_depth;
if (!r600_init_flushed_depth_texture(ctx, texture, &staging_depth)) {
R600_ERR("failed to create temporary texture to hold untiled copy\n");
@@ -553,7 +553,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
}
trans->transfer.stride =
- ((struct r600_resource_texture *)trans->staging)->surface.level[0].pitch_bytes;
+ ((struct r600_texture *)trans->staging)->surface.level[0].pitch_bytes;
if (usage & PIPE_TRANSFER_READ) {
r600_copy_to_staging_texture(ctx, trans);
/* Always referenced in the blit. */
@@ -572,7 +572,7 @@ void r600_texture_transfer_destroy(struct pipe_context *ctx,
{
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct pipe_resource *texture = transfer->resource;
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
+ struct r600_texture *rtex = (struct r600_texture*)texture;
if ((transfer->usage & PIPE_TRANSFER_WRITE) && rtransfer->staging) {
if (rtex->is_depth) {
@@ -598,8 +598,8 @@ void* r600_texture_transfer_map(struct pipe_context *ctx,
struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct radeon_winsys_cs_handle *buf;
- struct r600_resource_texture *rtex =
- (struct r600_resource_texture*)transfer->resource;
+ struct r600_texture *rtex =
+ (struct r600_texture*)transfer->resource;
enum pipe_format format = transfer->resource->format;
unsigned offset = 0;
char *map;
--
1.7.9.5
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