[Mesa-dev] [PATCH 1/3] radon/llvm: br_cc f32 now lowered without cast
Tom Stellard
tstellar at gmail.com
Tue Aug 21 07:01:54 PDT 2012
On Tue, Aug 21, 2012 at 12:41:07AM +0200, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
> ---
> src/gallium/drivers/radeon/R600ISelLowering.cpp | 33 ++++++++++++++++++-------
> 1 file changed, 24 insertions(+), 9 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
> index fe99582..4b89f7e 100644
> --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
> +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
> @@ -34,7 +34,8 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
> computeRegisterProperties();
>
> setOperationAction(ISD::BR_CC, MVT::i32, Custom);
> -
> + setOperationAction(ISD::BR_CC, MVT::f32, Custom);
> +
> setOperationAction(ISD::FSUB, MVT::f32, Expand);
>
> setOperationAction(ISD::ROTL, MVT::i32, Custom);
> @@ -293,14 +294,28 @@ SDValue R600TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
> SDValue JumpT = Op.getOperand(4);
> SDValue CmpValue;
> SDValue Result;
> - CmpValue = DAG.getNode(
> - ISD::SELECT_CC,
> - Op.getDebugLoc(),
> - MVT::i32,
> - LHS, RHS,
> - DAG.getConstant(-1, MVT::i32),
> - DAG.getConstant(0, MVT::i32),
> - CC);
> +
> + if (LHS.getValueType() == MVT::i32) {
> + CmpValue = DAG.getNode(
> + ISD::SELECT_CC,
> + Op.getDebugLoc(),
> + MVT::i32,
> + LHS, RHS,
> + DAG.getConstant(-1, MVT::i32),
> + DAG.getConstant(0, MVT::i32),
> + CC);
> + } else if (LHS.getValueType() == MVT::f32) {
> + CmpValue = DAG.getNode(
> + ISD::SELECT_CC,
> + Op.getDebugLoc(),
> + MVT::f32,
> + LHS, RHS,
> + DAG.getConstantFP(-1., MVT::f32),
> + DAG.getConstantFP(0., MVT::f32),
> + CC);
> + } else {
> + assert(0 && "Not valid type for br_cc");
> + }
> Result = DAG.getNode(
> AMDGPUISD::BRANCH_COND,
> CmpValue.getDebugLoc(),
> --
> 1.7.11.4
>
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