[Mesa-dev] [PATCH 04/11] i965: Add missing BRW_NEW_BATCH dirty bit to the Gen6 GS state atom.

[Kenneth Graunke]

Without MI_SET_CONTEXT, there's no guarantee that another program hasn't
reprogram the GPU's GS state since our last batch.  We need to submit
it every time.

This is especially important now that we actually use the GS unit:
different Mesa-based programs may program it to different states.

Found by inspection.

NOTE: This is a candidate for the 7.11 branch.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/gen6_gs_state.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index fdad5d4..88d9adf 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -84,6 +84,7 @@ const struct brw_tracked_state gen6_gs_state = {
    .dirty = {
       .mesa  = _NEW_TRANSFORM,
       .brw   = (BRW_NEW_URB_FENCE |
+		BRW_NEW_BATCH |
 		BRW_NEW_CONTEXT),
       .cache = CACHE_NEW_GS_PROG
    },
-- 
1.7.7.5