[Mesa-dev] [PATCH v2] intel: Set depth to 6 for cubemaps

[Kenneth Graunke]

On 01/17/2012 02:55 PM, Ian Romanick wrote:
> From: Ian Romanick<ian.d.romanick at intel.com>
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41216
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43212
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43250
> Signed-off-by: Ian Romanick<ian.d.romanick at intel.com>
> Reviewed-by: Chad Versace<chad.versace at linux.intel.com>
> Cc: Jin Yang<jin.a.yang at intel.com>
> ---
> v2: Rework the changes to brw_tex_layout.c based on discussions with
> Chad.  Apparently, the brw code worked before (but was confusing)
> because mt->depth0 is already set to 6 for cubemaps.
>
>   src/mesa/drivers/dri/i915/i915_tex_layout.c |    4 ++--
>   src/mesa/drivers/dri/i965/brw_tex_layout.c  |    6 +++---
>   2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
> index caa7127..1e3cfad 100644
> --- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
> +++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
> @@ -129,7 +129,7 @@ i915_miptree_layout_cube(struct intel_mipmap_tree * mt)
>         intel_miptree_set_level_info(mt, level,
>   				   0, 0,
>   				   lvlWidth, lvlHeight,
> -				   1);
> +				   6);
>         lvlWidth /= 2;
>         lvlHeight /= 2;
>      }
> @@ -337,7 +337,7 @@ i945_miptree_layout_cube(struct intel_mipmap_tree * mt)
>      for (level = mt->first_level; level<= mt->last_level; level++) {
>         intel_miptree_set_level_info(mt, level,
>   				   0, 0,
> -				   lvlWidth, lvlHeight, 1);
> +				   lvlWidth, lvlHeight, 6);
>         lvlWidth /= 2;
>         lvlHeight /= 2;
>      }
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index 4c7e88c..7a1b91f 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -77,6 +77,7 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
>   	 brw_miptree_layout_texture_array(intel, mt);
>   	 break;
>         }
> +      assert(mt->depth0 == 6);
>         /* FALLTHROUGH */
>
>      case GL_TEXTURE_3D: {
> @@ -101,7 +102,6 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
>         pack_x_nr = 1;
>
>         for (level = mt->first_level ; level<= mt->last_level ; level++) {
> -	 GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6;
>   	 GLint x = 0;
>   	 GLint y = 0;
>   	 GLint q, j;
> @@ -110,8 +110,8 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
>   				      0, mt->total_height,
>   				      width, height, depth);
>
> -	 for (q = 0; q<  nr_images;) {
> -	    for (j = 0; j<  pack_x_nr&&  q<  nr_images; j++, q++) {
> +	 for (q = 0; q<  depth; /* empty */) {
> +	    for (j = 0; j<  pack_x_nr&&  q<  depth; j++, q++) {
>   	       intel_miptree_set_image_offset(mt, level, q, x, y);
>   	       x += pack_x_pitch;
>   	    }

I could've sworn I made this change a while back...maybe the patch got 
lost.  Or my memory.  Thanks for fixing this.

Please test this on Gen4 or GM45 before pushing it.  The brw code you 
modified doesn't get executed on Gen5+.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>