[Mesa-dev] [PATCH 1/2] radeon/llvm: Set FlagOperandIdx for RECIP_IEEE

Vincent Lejeune vljn at ovi.com
Thu Oct 18 07:12:27 PDT 2012


Fix nexuiz-glx -benchmark demos/demo1 crash
---
 lib/Target/AMDGPU/R600Instructions.td | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/lib/Target/AMDGPU/R600Instructions.td b/lib/Target/AMDGPU/R600Instructions.td
index 483d10a..2209df7 100644
--- a/lib/Target/AMDGPU/R600Instructions.td
+++ b/lib/Target/AMDGPU/R600Instructions.td
@@ -819,11 +819,6 @@ class RECIP_CLAMPED_Common <bits<11> inst> : R600_1OP <
   []
 >;
 
-class RECIP_IEEE_Common <bits<11> inst> : R600_1OP <
-  inst, "RECIP_IEEE",
-  [(set R600_Reg32:$dst, (int_AMDGPU_rcp R600_Reg32:$src))]
->;
-
 class RECIP_UINT_Common <bits<11> inst> : R600_1OP <
   inst, "RECIP_INT $dst, $src",
   [(set R600_Reg32:$dst, (AMDGPUurecip R600_Reg32:$src))]
@@ -831,6 +826,11 @@ class RECIP_UINT_Common <bits<11> inst> : R600_1OP <
 
 let FlagOperandIdx = 3 in {
 
+class RECIP_IEEE_Common <bits<11> inst> : R600_1OP <
+  inst, "RECIP_IEEE",
+  [(set R600_Reg32:$dst, (int_AMDGPU_rcp R600_Reg32:$src))]
+>;
+
 class RECIPSQRT_CLAMPED_Common <bits<11> inst> : R600_1OP <
   inst, "RECIPSQRT_CLAMPED",
   [(set R600_Reg32:$dst, (int_AMDGPU_rsq R600_Reg32:$src))]
-- 
1.7.11.7



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