[Mesa-dev] [PATCH 2/4] radeon/llvm: SI shader vector instructions implicitly use the EXEC register.

[Michel Dänzer]

On Don, 2012-09-06 at 09:45 -0400, Tom Stellard wrote: 
> On Thu, Sep 06, 2012 at 01:00:01PM +0200, Michel Dänzer wrote:
> > From: Michel Dänzer <michel.daenzer at amd.com>
> 
> I'm still not quite sure what the intended use cases are for adding
> implicit uses and defs to instructions.  I tried to do this with the VCC
> register for VOPC and the V_CNDMASK instructions, but the optimizer
> was incorrectly marking some instructions dead.  It's possible there was
> something else I was doing that was wrong, but in any case I think we
> should keep an eye on this for potential bugs.

Yeah, I was hitting similar issues trying to only enable WQM for the
parts where it's really needed. I suspect the problem is that implicit
uses and defs only reference the physical registers, whereas the
optimizer only tracks dependencies between values. But I have no idea
yet how that could be addressed in order to e.g. prevent vector
instructions from being moved beyond changes to the EXEC register.


> Either way, this change won't hurt anything.

Right, although this does seem to at least prevent the enabling of WQM
from being considered dead and removed.


> Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Thanks!


-- 
Earthling Michel Dänzer           |                   http://www.amd.com
Libre software enthusiast         |          Debian, X and DRI developer