[Mesa-dev] [PATCH 2/3] i965/gen7: Set MOCS L3 cacheability for IVB/BYT

[Vedran Rodic]

> We do have the set_caching ioctl. It's enough to flip the PTEs to UC and
> let MOCS manage things. I actually did a few experiments on my IVB. I
> made all Mesa's buffers UC via PTEs by patching libdrm to change the
> cache mode of each bo after allocation. Then I fiddled with the MOCS
> LLC bits in various ways. It definitely has an effect, sometimes making
> things slower, sometimes faster. xonotic again seemed to benefit. IIRC
> leaving everything LLC uncached was actually the fastest (w/ high quality
> at least) so we may be thrashing the LLC a bit there. But eg. reaction
> quake regressed quite a lot if most things were left as UC.

Can you share the libdrm patch?