[Mesa-dev] [PATCH 04/15] i965/vs: Add support for translating ir_triop_fma into MAD.

Matt Turner mattst88 at gmail.com
Thu Aug 22 16:08:24 PDT 2013


---
 src/mesa/drivers/dri/i965/brw_vec4.h           |  1 +
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 11 +++++++++++
 2 files changed, 12 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 111b105..4bc3b99 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -389,6 +389,7 @@ public:
    vec4_instruction *FBH(dst_reg dst, src_reg value);
    vec4_instruction *FBL(dst_reg dst, src_reg value);
    vec4_instruction *CBIT(dst_reg dst, src_reg value);
+   vec4_instruction *MAD(dst_reg dst, src_reg c, src_reg b, src_reg a);
 
    int implied_mrf_writes(vec4_instruction *inst);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 455d9dc..57a8e76 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -143,6 +143,7 @@ ALU3(BFI2)
 ALU1(FBH)
 ALU1(FBL)
 ALU1(CBIT)
+ALU3(MAD)
 
 /** Gen4 predicated IF. */
 vec4_instruction *
@@ -1710,6 +1711,16 @@ vec4_visitor::visit(ir_expression *ir)
       assert(!"should have been lowered by vec_index_to_cond_assign");
       break;
 
+   case ir_triop_fma:
+      op[0] = fix_3src_operand(op[0]);
+      op[1] = fix_3src_operand(op[1]);
+      op[2] = fix_3src_operand(op[2]);
+      /* Note that the instruction's argument order is reversed from GLSL
+       * and the IR.
+       */
+      emit(MAD(result_dst, op[2], op[1], op[0]));
+      break;
+
    case ir_triop_lrp:
       op[0] = fix_3src_operand(op[0]);
       op[1] = fix_3src_operand(op[1]);
-- 
1.8.3.2



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