[Mesa-dev] [RFC PATCH 03/12] i965: Temporarily disable resource streamer when state base address is updated.

[Abdiel Janulgue]

Prior to changing the Surface State Base Address, the resouce streamer must be disabled
within a batch buffer where the RS is enabled. RS is re-enabled again once the SBA is updated.

Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_misc_state.c  |    7 +++++++
 src/mesa/drivers/dri/i965/brw_state.h       |    3 +++
 src/mesa/drivers/dri/i965/gen7_misc_state.c |   10 ++++++++++
 3 files changed, 20 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 23faee6..f35149d 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -1047,6 +1047,9 @@ static void upload_state_base_address( struct brw_context *brw )
       if (intel->gen == 6)
 	 intel_emit_post_sync_nonzero_flush(intel);
 
+       if (intel->is_haswell)
+          gen7_rs_control(brw, 0x0);
+
        BEGIN_BATCH(10);
        OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (10 - 2));
        /* General state base address: stateless DP read/write requests */
@@ -1083,6 +1086,10 @@ static void upload_state_base_address( struct brw_context *brw )
        OUT_BATCH(1); /* Indirect object upper bound */
        OUT_BATCH(1); /* Instruction access upper bound */
        ADVANCE_BATCH();
+
+       if (intel->is_haswell)
+          gen7_rs_control(brw, 0x1);
+
    } else if (intel->gen == 5) {
        BEGIN_BATCH(8);
        OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (8 - 2));
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 3ac65cf..43e5b0c 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -210,6 +210,9 @@ uint32_t
 get_attr_override(const struct brw_vue_map *vue_map, int urb_entry_read_offset,
                   int fs_attr, bool two_side_color, uint32_t *max_source_attr);
 
+/* Haswell Resource streamer controls */
+void gen7_rs_control(struct brw_context *brw, int enable);
+
 /* gen7_urb.c */
 void gen7_allocate_push_constants(struct brw_context *brw);
 
diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index 539fc32..0c96681 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -138,3 +138,13 @@ const struct brw_tracked_state gen7_depthbuffer = {
    },
    .emit = brw_emit_depthbuffer,
 };
+
+void
+gen7_rs_control(struct brw_context *brw, int enable)
+{
+   struct intel_context *intel = &brw->intel;
+
+   BEGIN_BATCH(1);
+   OUT_BATCH(MI_RS_CONTROL | enable);
+   ADVANCE_BATCH();
+}
-- 
1.7.9.5