[Mesa-dev] [PATCH 3/5] i965/hsw: Change L3 MOCS of SURFACE_STATE

Daniel Vetter daniel at ffwll.ch
Fri Jul 19 09:58:52 PDT 2013


On Fri, Jul 19, 2013 at 02:03:31PM +0100, Chris Wilson wrote:
> On Thu, Jul 18, 2013 at 03:00:59PM -0700, Chad Versace wrote:
> > Change from "not cacheable" to "cacheable" in L3.
> > Do so for the draw upload path and blorp.
> 
> I just tested using mocs on the scanout for Haswell and you do get
> blatant cache dirt. This is probably only a minor worry for mesa, but it
> is worth a comment for somebody who sees the dirt to try and rectify.

This could also affect correctnes if e.g. mesa marks an object as
uncached, but the kernel still treats it as cached. Effect should be the
same cacheline dirts, and they can happen even if mesa _never_ access the
bo from the gpu with cached mocs settings or with the cpu.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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