[Mesa-dev] [PATCH 3/5] i965/hsw: Change L3 MOCS of SURFACE_STATE

[Chad Versace]

On 07/19/2013 09:58 AM, Daniel Vetter wrote:
> On Fri, Jul 19, 2013 at 02:03:31PM +0100, Chris Wilson wrote:
>> On Thu, Jul 18, 2013 at 03:00:59PM -0700, Chad Versace wrote:
>>> Change from "not cacheable" to "cacheable" in L3.
>>> Do so for the draw upload path and blorp.
>>
>> I just tested using mocs on the scanout for Haswell and you do get
>> blatant cache dirt. This is probably only a minor worry for mesa, but it
>> is worth a comment for somebody who sees the dirt to try and rectify.

I was unable to see the scanout cache dirt with my experiment, so I conclude that my
experiment wasn't stringent enough. Explain how your experiment, so I can use your
method going forward.

> This could also affect correctnes if e.g. mesa marks an object as
> uncached, but the kernel still treats it as cached. Effect should be the
> same cacheline dirts, and they can happen even if mesa _never_ access the
> bo from the gpu with cached mocs settings or with the cpu.

There are two types of MOCS: that specified in batch commands, and that specified
in the PTE. On Haswell, until this series, Mesa marked every batch MOCS as uncacheable
in L3. And, the PTE MOCS on Haswell lacks L3 control. Given that, nearly nothing from Mesa was ever
cached in L3. So, would you have expected cache dirt? (I'm asking because I don't
know how the kernel treats the cacheability of buffers).