[Mesa-dev] [PATCH 3/5] i965/hsw: Change L3 MOCS of SURFACE_STATE

[Chris Wilson]

On Fri, Jul 19, 2013 at 10:19:12AM -0700, Chad Versace wrote:
> On 07/19/2013 09:58 AM, Daniel Vetter wrote:
> >On Fri, Jul 19, 2013 at 02:03:31PM +0100, Chris Wilson wrote:
> >>On Thu, Jul 18, 2013 at 03:00:59PM -0700, Chad Versace wrote:
> >>>Change from "not cacheable" to "cacheable" in L3.
> >>>Do so for the draw upload path and blorp.
> >>
> >>I just tested using mocs on the scanout for Haswell and you do get
> >>blatant cache dirt. This is probably only a minor worry for mesa, but it
> >>is worth a comment for somebody who sees the dirt to try and rectify.
> 
> I was unable to see the scanout cache dirt with my experiment, so I conclude that my
> experiment wasn't stringent enough. Explain how your experiment, so I can use your
> method going forward.

I turned it on in the ddx and used a bare X session. That way I knew I
would end up rendering onto the scanout. The dirt was easy to see in
firefox. Sad, because it did give a nice boost to performance.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre