[Mesa-dev] [PATCH V2 09/15] i965: add state atom for indirect buffer

[Chris Forbes]

OK -- that's much simpler, thanks.

On Fri, Nov 8, 2013 at 7:11 AM, Eric Anholt <eric at anholt.net> wrote:
> Chris Forbes <chrisf at ijw.co.nz> writes:
>
>> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
>> ---
>>  src/mesa/drivers/dri/i965/brw_context.h      | 10 +++++++++
>>  src/mesa/drivers/dri/i965/brw_draw_upload.c  | 32 ++++++++++++++++++++++++++++
>>  src/mesa/drivers/dri/i965/brw_state.h        |  1 +
>>  src/mesa/drivers/dri/i965/brw_state_upload.c |  2 ++
>>  4 files changed, 45 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
>> index ffbfcaa..a0228cf 100644
>> --- a/src/mesa/drivers/dri/i965/brw_context.h
>> +++ b/src/mesa/drivers/dri/i965/brw_context.h
>> @@ -185,6 +185,7 @@ enum brw_state_id {
>>     BRW_STATE_META_IN_PROGRESS,
>>     BRW_STATE_INTERPOLATION_MAP,
>>     BRW_STATE_PUSH_CONSTANT_ALLOCATION,
>> +   BRW_STATE_INDIRECT_BUFFER,
>>     BRW_NUM_STATE_BITS
>>  };
>>
>> @@ -224,6 +225,7 @@ enum brw_state_id {
>>  #define BRW_NEW_META_IN_PROGRESS        (1 << BRW_STATE_META_IN_PROGRESS)
>>  #define BRW_NEW_INTERPOLATION_MAP       (1 << BRW_STATE_INTERPOLATION_MAP)
>>  #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 << BRW_STATE_PUSH_CONSTANT_ALLOCATION)
>> +#define BRW_NEW_INDIRECT_BUFFER         (1 << BRW_STATE_INDIRECT_BUFFER)
>>
>>  struct brw_state_flags {
>>     /** State update flags signalled by mesa internals */
>> @@ -1165,6 +1167,14 @@ struct brw_context
>>        unsigned int start_vertex_offset;
>>     } ib;
>>
>> +   struct {
>> +      /**
>> +       * Draw indirect buffer for this draw_prims call.
>> +       */
>> +      const struct gl_buffer_object *indb;
>> +      drm_intel_bo *bo;
>> +   } indirect_buffer;
>> +
>>     /* Active vertex program:
>>      */
>>     const struct gl_vertex_program *vertex_program;
>> diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
>> index 4da1b7e..4e7478a 100644
>> --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
>> +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
>> @@ -933,3 +933,35 @@ const struct brw_tracked_state brw_index_buffer = {
>>     },
>>     .emit = brw_emit_index_buffer,
>>  };
>> +
>> +
>> +static void brw_upload_indirect_buffer(struct brw_context *brw)
>> +{
>> +   struct gl_context *ctx = &brw->ctx;
>> +   struct gl_buffer_object *bufferobj;
>> +   drm_intel_bo *bo;
>> +
>> +   bufferobj = brw->indirect_buffer.indb;
>> +   if (bufferobj == NULL)
>> +      return;
>> +
>> +   bo = intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
>> +                               0, bufferobj->Size);
>> +   drm_intel_bo_reference(bo);
>> +
>> +   if (brw->indirect_buffer.bo != bo) {
>> +      drm_intel_bo_unreference(brw->indirect_buffer.bo);
>> +      brw->indirect_buffer.bo = bo;
>> +   }
>> +   else {
>> +      drm_intel_bo_unreference(bo);
>> +   }
>> +};
>
> I don't think the extra refcounting and context fields here are worth
> saving just doing a
>
>    bo = intel_bufferobj_buffer(brw, intel_buffer_object(indirect),
>                                0, bufferobj->Size);
>
> per primitive in the indirect-only path that appears later in the
> primitive setup.
>
>> +const struct brw_tracked_state brw_indirect_buffer = {
>> +   .dirty = {
>> +      .brw = BRW_NEW_BATCH | BRW_NEW_INDIRECT_BUFFER,
>> +   },
>> +   .emit = brw_upload_indirect_buffer,
>> +};
>
> There's nothing batch-dependent here.