[Mesa-dev] [PATCH] i965: Implement ABO surface state emission.

Adrian M Negreanu groleo at gmail.com
Wed Oct 2 11:46:52 PDT 2013


On Oct 2, 2013 9:29 PM, "Francisco Jerez" <currojerez at riseup.net> wrote:
>
> The maximum number of atomic buffer objects is somewhat arbitrary, we
> can change it in the future easily if it turns out it's not enough...
>
> v2: Add comments with the relevant mesa dirty bits.  Fix usage of
>     BRW_NEW_UNIFORM_BUFFER in the GS ABO state atom.
> v3: Update binding table layout diagrams.
>
> Reviewed-by: Paul Berry <stereotype441 at gmail.com>
Hi,
I guess this patch also depends on pending patches, right?
Aiaiai-mesa fails to built it:

On Oct 2, 2013 9:39 PM, "Aiaiai" <aiaiai at aiaiai.ku> wrote:
Hi,

I have tested your changes:

[Mesa-dev] [PATCH] i965: Implement ABO surface state emission.

Project: mesa (Mesa build tests)

Configurations: android linux

================================================================================
Tested the patch(es) on top of the following commits:
4e4c32b r600/llvm: Adds support for MSAA
8edbd76 r600g/llvm: Undef z and w component of 2D TXP inst
9f183eb r600g/llvm: fix txq for texture buffer
848c0e7 i965: compute DDX in a subspan based only on top row
72edba1 i965/blorp: Use passed in framebuffer rather than ctx->DrawBuffer
ef8cc3e ralloc: Remove the rzalloc-based new/delete operator definition
macro.
fcbbecb st/mesa: Switch glsl_to_tgsi_instruction to the non-zeroing
allocator.

================================================================================
Failed to build for "android""

4e4c32b r600/llvm: Adds support for MSAA
8edbd76 r600g/llvm: Undef z and w component of 2D TXP inst
9f183eb r600g/llvm: fix txq for texture buffer
848c0e7 i965: compute DDX in a subspan based only on top row
72edba1 i965/blorp: Use passed in framebuffer rather than ctx->DrawBuffer
ef8cc3e ralloc: Remove the rzalloc-based new/delete operator definition
macro.
fcbbecb st/mesa: Switch glsl_to_tgsi_instruction to the non-zeroing
allocator.
src/mesa/drivers/dri/i965/brw_state_dump.c:423:63: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c: In function 'dump_vs_constants':
src/mesa/drivers/dri/i965/brw_state_dump.c:435:47: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c:436:45: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c: In function 'dump_wm_constants':
src/mesa/drivers/dri/i965/brw_state_dump.c:451:47: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c:452:45: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c: In function
'dump_binding_table':
src/mesa/drivers/dri/i965/brw_state_dump.c:468:44: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_state_dump.c: In function 'dump_prog_cache':
src/mesa/drivers/dri/i965/brw_state_dump.c:495:33: warning: pointer of type
'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_vs_surface_state.c: In function
'brw_upload_vec4_pull_constants':
src/mesa/drivers/dri/i965/brw_vs_surface_state.c:72:45: warning: pointer of
type 'void *' used in arithmetic [-Wpointer-arith]
src/mesa/drivers/dri/i965/brw_wm_surface_state.c: In function
'brw_upload_abo_surfaces':
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:842:28: error: 'struct
gl_shader_program' has no member named 'NumAtomicBuffers'
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:844:14: error: 'struct
gl_context' has no member named 'AtomicBufferBindings'
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:844:41: error: 'struct
gl_shader_program' has no member named 'AtomicBuffers'
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:846:37: error:
dereferencing pointer to incomplete type
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:850:16: error: 'struct
<anonymous>' has no member named 'create_raw_surface'
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:850:52: error:
dereferencing pointer to incomplete type
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:851:54: error:
dereferencing pointer to incomplete type
src/mesa/drivers/dri/i965/brw_wm_surface_state.c:855:12: error: 'struct
gl_shader_program' has no member named 'NumAtomicBuffers'
make: ***
[out/target/product/samsungxe700t/obj/SHARED_LIBRARIES/i965_dri_intermediates/brw_wm_surface_state.o]
Error 1
FAILURE

================================

> ---
>  src/mesa/drivers/dri/i965/brw_context.h          | 27 ++++++++++++--
>  src/mesa/drivers/dri/i965/brw_gs_surface_state.c | 21 +++++++++++
>  src/mesa/drivers/dri/i965/brw_state.h            |  3 ++
>  src/mesa/drivers/dri/i965/brw_state_upload.c     |  4 +++
>  src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 21 +++++++++++
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 45
++++++++++++++++++++++++
>  6 files changed, 119 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
> index 3922705..1407f20 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -158,6 +158,7 @@ enum brw_state_id {
>     BRW_STATE_RASTERIZER_DISCARD,
>     BRW_STATE_STATS_WM,
>     BRW_STATE_UNIFORM_BUFFER,
> +   BRW_STATE_ATOMIC_BUFFER,
>     BRW_STATE_META_IN_PROGRESS,
>     BRW_STATE_INTERPOLATION_MAP,
>     BRW_STATE_PUSH_CONSTANT_ALLOCATION,
> @@ -196,6 +197,7 @@ enum brw_state_id {
>  #define BRW_NEW_RASTERIZER_DISCARD     (1 <<
BRW_STATE_RASTERIZER_DISCARD)
>  #define BRW_NEW_STATS_WM               (1 << BRW_STATE_STATS_WM)
>  #define BRW_NEW_UNIFORM_BUFFER          (1 << BRW_STATE_UNIFORM_BUFFER)
> +#define BRW_NEW_ATOMIC_BUFFER           (1 << BRW_STATE_ATOMIC_BUFFER)
>  #define BRW_NEW_META_IN_PROGRESS        (1 << BRW_STATE_META_IN_PROGRESS)
>  #define BRW_NEW_INTERPOLATION_MAP       (1 <<
BRW_STATE_INTERPOLATION_MAP)
>  #define BRW_NEW_PUSH_CONSTANT_ALLOCATION (1 <<
BRW_STATE_PUSH_CONSTANT_ALLOCATION)
> @@ -599,6 +601,12 @@ struct brw_gs_prog_data
>  /** Max number of render targets in a shader */
>  #define BRW_MAX_DRAW_BUFFERS 8
>
> +/** Max number of uniform buffer objects in a shader */
> +#define BRW_MAX_UBO 12
> +
> +/** Max number of atomic counter buffer objects in a shader */
> +#define BRW_MAX_ABO 4
> +
>  /**
>   * Max number of binding table entries used for stream output.
>   *
> @@ -661,6 +669,11 @@ struct brw_gs_prog_data
>   *    |   : |     :                   |
>   *    |  36 | UBO 11                  |
>   *    +-------------------------------+
> + *    |  37 | ABO 0                   |
> + *    |   . |     .                   |
> + *    |   : |     :                   |
> + *    |  40 | ABO 3                   |
> + *    +-------------------------------+
>   *
>   * Our VS (and Gen7 GS) binding tables are programmed as follows:
>   *
> @@ -677,6 +690,11 @@ struct brw_gs_prog_data
>   *    |   : |     :                   |
>   *    |  28 | UBO 11                  |
>   *    +-------------------------------+
> + *    |  29 | ABO 0                   |
> + *    |   . |     .                   |
> + *    |   : |     :                   |
> + *    |  32 | ABO 3                   |
> + *    +-------------------------------+
>   *
>   * Our (gen6) GS binding tables are programmed as follows:
>   *
> @@ -691,14 +709,16 @@ struct brw_gs_prog_data
>  #define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
>  #define SURF_INDEX_TEXTURE(t)        (BRW_MAX_DRAW_BUFFERS + 2 + (t))
>  #define SURF_INDEX_WM_UBO(u)
(SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
> -#define SURF_INDEX_WM_SHADER_TIME    (SURF_INDEX_WM_UBO(12))
> +#define SURF_INDEX_WM_ABO(a)         (SURF_INDEX_WM_UBO(BRW_MAX_UBO) + a)
> +#define SURF_INDEX_WM_SHADER_TIME    (SURF_INDEX_WM_ABO(BRW_MAX_ABO))
>  /** Maximum size of the binding table. */
>  #define BRW_MAX_WM_SURFACES          (SURF_INDEX_WM_SHADER_TIME + 1)
>
>  #define SURF_INDEX_VEC4_CONST_BUFFER (0)
>  #define SURF_INDEX_VEC4_TEXTURE(t)   (SURF_INDEX_VEC4_CONST_BUFFER + 1 +
(t))
>  #define SURF_INDEX_VEC4_UBO(u)
(SURF_INDEX_VEC4_TEXTURE(BRW_MAX_TEX_UNIT) + u)
> -#define SURF_INDEX_VEC4_SHADER_TIME  (SURF_INDEX_VEC4_UBO(12))
> +#define SURF_INDEX_VEC4_ABO(a)       (SURF_INDEX_VEC4_UBO(BRW_MAX_UBO) +
a)
> +#define SURF_INDEX_VEC4_SHADER_TIME  (SURF_INDEX_VEC4_ABO(BRW_MAX_ABO))
>  #define BRW_MAX_VEC4_SURFACES        (SURF_INDEX_VEC4_SHADER_TIME + 1)
>
>  #define SURF_INDEX_GEN6_SOL_BINDING(t) (t)
> @@ -1498,6 +1518,9 @@ brw_update_sol_surface(struct brw_context *brw,
>  void brw_upload_ubo_surfaces(struct brw_context *brw,
>                              struct gl_shader *shader,
>                              uint32_t *surf_offsets);
> +void brw_upload_abo_surfaces(struct brw_context *brw,
> +                             struct gl_shader_program *prog,
> +                             uint32_t *surf_offsets);
>
>  /* brw_surface_formats.c */
>  bool brw_is_hiz_depth_format(struct brw_context *ctx, gl_format format);
> diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
> index d0ce412..05f9efa 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
> @@ -87,3 +87,24 @@ const struct brw_tracked_state brw_gs_ubo_surfaces = {
>     },
>     .emit = brw_upload_gs_ubo_surfaces,
>  };
> +
> +static void
> +brw_upload_gs_abo_surfaces(struct brw_context *brw)
> +{
> +   struct gl_context *ctx = &brw->ctx;
> +   /* _NEW_PROGRAM */
> +   struct gl_shader_program *prog = ctx->Shader.CurrentGeometryProgram;
> +
> +   if (prog)
> +      brw_upload_abo_surfaces(
> +         brw, prog, &brw->gs.base.surf_offset[SURF_INDEX_VEC4_ABO(0)]);
> +}
> +
> +const struct brw_tracked_state brw_gs_abo_surfaces = {
> +   .dirty = {
> +      .mesa = _NEW_PROGRAM,
> +      .brw = BRW_NEW_BATCH | BRW_NEW_ATOMIC_BUFFER,
> +      .cache = 0,
> +   },
> +   .emit = brw_upload_gs_abo_surfaces,
> +};
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
> index ec64328..ed8ce33 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -71,7 +71,9 @@ extern const struct brw_tracked_state brw_vs_prog;
>  extern const struct brw_tracked_state brw_vs_samplers;
>  extern const struct brw_tracked_state brw_gs_samplers;
>  extern const struct brw_tracked_state brw_vs_ubo_surfaces;
> +extern const struct brw_tracked_state brw_vs_abo_surfaces;
>  extern const struct brw_tracked_state brw_gs_ubo_surfaces;
> +extern const struct brw_tracked_state brw_gs_abo_surfaces;
>  extern const struct brw_tracked_state brw_vs_unit;
>  extern const struct brw_tracked_state brw_gs_prog;
>  extern const struct brw_tracked_state brw_wm_prog;
> @@ -81,6 +83,7 @@ extern const struct brw_tracked_state
brw_wm_binding_table;
>  extern const struct brw_tracked_state brw_gs_binding_table;
>  extern const struct brw_tracked_state brw_vs_binding_table;
>  extern const struct brw_tracked_state brw_wm_ubo_surfaces;
> +extern const struct brw_tracked_state brw_wm_abo_surfaces;
>  extern const struct brw_tracked_state brw_wm_unit;
>  extern const struct brw_tracked_state brw_interpolation_map;
>
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index d7fe319..64ffcd0 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -204,10 +204,13 @@ static const struct brw_tracked_state *gen7_atoms[]
=
>      */
>     &brw_vs_pull_constants,
>     &brw_vs_ubo_surfaces,
> +   &brw_vs_abo_surfaces,
>     &brw_gs_pull_constants,
>     &brw_gs_ubo_surfaces,
> +   &brw_gs_abo_surfaces,
>     &brw_wm_pull_constants,
>     &brw_wm_ubo_surfaces,
> +   &brw_wm_abo_surfaces,
>     &gen6_renderbuffer_surfaces,
>     &brw_texture_surfaces,
>     &brw_vs_binding_table,
> @@ -398,6 +401,7 @@ static struct dirty_bit_map brw_bits[] = {
>     DEFINE_BIT(BRW_NEW_RASTERIZER_DISCARD),
>     DEFINE_BIT(BRW_NEW_STATS_WM),
>     DEFINE_BIT(BRW_NEW_UNIFORM_BUFFER),
> +   DEFINE_BIT(BRW_NEW_ATOMIC_BUFFER),
>     DEFINE_BIT(BRW_NEW_META_IN_PROGRESS),
>     DEFINE_BIT(BRW_NEW_INTERPOLATION_MAP),
>     DEFINE_BIT(BRW_NEW_PUSH_CONSTANT_ALLOCATION),
> diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
> index 2c5d06f..c6461c7 100644
> --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
> @@ -148,3 +148,24 @@ const struct brw_tracked_state brw_vs_ubo_surfaces =
{
>     },
>     .emit = brw_upload_vs_ubo_surfaces,
>  };
> +
> +static void
> +brw_upload_vs_abo_surfaces(struct brw_context *brw)
> +{
> +   struct gl_context *ctx = &brw->ctx;
> +   /* _NEW_PROGRAM */
> +   struct gl_shader_program *prog = ctx->Shader.CurrentVertexProgram;
> +
> +   if (prog)
> +      brw_upload_abo_surfaces(
> +         brw, prog, &brw->vs.base.surf_offset[SURF_INDEX_VEC4_ABO(0)]);
> +}
> +
> +const struct brw_tracked_state brw_vs_abo_surfaces = {
> +   .dirty = {
> +      .mesa = _NEW_PROGRAM,
> +      .brw = BRW_NEW_BATCH | BRW_NEW_ATOMIC_BUFFER,
> +      .cache = 0,
> +   },
> +   .emit = brw_upload_vs_abo_surfaces,
> +};
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 4c3eb69..70f1391 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -833,6 +833,51 @@ const struct brw_tracked_state brw_wm_ubo_surfaces =
{
>  };
>
>  void
> +brw_upload_abo_surfaces(struct brw_context *brw,
> +                       struct gl_shader_program *prog,
> +                       uint32_t *surf_offsets)
> +{
> +   struct gl_context *ctx = &brw->ctx;
> +
> +   for (int i = 0; i < prog->NumAtomicBuffers; i++) {
> +      struct gl_atomic_buffer_binding *binding =
> +         &ctx->AtomicBufferBindings[prog->AtomicBuffers[i].Binding];
> +      struct intel_buffer_object *intel_bo =
> +         intel_buffer_object(binding->BufferObject);
> +      drm_intel_bo *bo = intel_bufferobj_buffer(brw, intel_bo,
> +                                                INTEL_READ |
INTEL_WRITE_PART);
> +
> +      brw->vtbl.create_raw_surface(brw, bo, binding->Offset,
> +                                   bo->size - binding->Offset,
> +                                   &surf_offsets[i], true);
> +   }
> +
> +   if (prog->NumAtomicBuffers)
> +      brw->state.dirty.brw |= BRW_NEW_SURFACES;
> +}
> +
> +static void
> +brw_upload_wm_abo_surfaces(struct brw_context *brw)
> +{
> +   struct gl_context *ctx = &brw->ctx;
> +   /* _NEW_PROGRAM */
> +   struct gl_shader_program *prog = ctx->Shader._CurrentFragmentProgram;
> +
> +   if (prog)
> +      brw_upload_abo_surfaces(
> +         brw, prog, &brw->wm.base.surf_offset[SURF_INDEX_WM_ABO(0)]);
> +}
> +
> +const struct brw_tracked_state brw_wm_abo_surfaces = {
> +   .dirty = {
> +      .mesa = _NEW_PROGRAM,
> +      .brw = BRW_NEW_BATCH | BRW_NEW_ATOMIC_BUFFER,
> +      .cache = 0,
> +   },
> +   .emit = brw_upload_wm_abo_surfaces,
> +};
> +
> +void
>  gen4_init_vtable_surface_functions(struct brw_context *brw)
>  {
>     brw->vtbl.update_texture_surface = brw_update_texture_surface;
> --
> 1.8.3.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
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