[Mesa-dev] [PATCH 6/8] i965/gs: fix up primitive ID workaround for DUAL_INSTANCE dispatch.

Paul Berry stereotype441 at gmail.com
Thu Oct 17 17:14:09 CEST 2013


Parallel change to "i965/gs: Fix up gl_PointSize input swizzling for
DUAL_INSTANCED gs.", except applied to the gl_PrimitiveID fixup
instead of the gl_PointSize fixup.
---
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  | 18 +++++++++++++++++-
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp | 10 +++++++++-
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 700da54..07e9697 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -876,7 +876,23 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       }
       break;
    case BRW_OPCODE_ADD:
-      brw_ADD(p, dst, src[0], src[1]);
+      if (dst.width == BRW_WIDTH_4) {
+         /* This happens in the geometry shader primitive ID workaround for
+          * "dual instanced" geometry shaders, since they use attributes
+          * (including gl_PrimitiveID) that are vec4's.  Since the exec width
+          * is only 4, it's essential that the caller set force_writemask_all
+          * in order to make sure the MOV happens regardless of which channels
+          * are enabled.
+          */
+         assert(inst->force_writemask_all);
+
+         /* To satisfy register region restrictions, the source registers need
+          * a stride of <4;4,1>.
+          */
+         brw_ADD(p, dst, stride(src[0], 4, 4, 1), stride(src[1], 4, 4, 1));
+      } else {
+         brw_ADD(p, dst, src[0], src[1]);
+      }
       break;
    case BRW_OPCODE_MUL:
       brw_MUL(p, dst, src[0], src[1]);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index 5b823c4..76209b0 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -149,7 +149,15 @@ vec4_gs_visitor::primitive_id_workaround()
    this->current_annotation = "primitive ID workaround";
    dst_reg dst(ATTR, VARYING_SLOT_PRIMITIVE_ID);
    dst.type = BRW_REGISTER_TYPE_UD;
-   emit(ADD(dst, src_reg(dst), src_reg(primitive_id_offset)));
+   vec4_instruction *inst =
+      emit(ADD(dst, src_reg(dst), src_reg(primitive_id_offset)));
+
+   /* In dual instanced dispatch mode, the primitive ID has a width of 4, so
+    * we need to make sure the ADD happens regardless of which channels are
+    * enabled.
+    */
+   inst->force_writemask_all = true;
+
    this->current_annotation = NULL;
 }
 
-- 
1.8.4.1



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