[Mesa-dev] [PATCH 02/10] glsl: Implement uaddCarry() built-in for ARB_gpu_shader5.

[Matt Turner]

i965 implements this with a single (multiple destination) instruction,
ADDC. Emitting ADDC directly from uaddCarry() would be ideal, but our
optimization passes don't know how to copy with expressions with
side-effects.

Radeon has an ADDC_UINT instruction that only generates the carry
bit. I've chosen to go this route and implement uaddCarry() by doing the
addition and the carry operations separately.
---
 src/glsl/builtin_functions.cpp | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 31f7489..7da9142 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
@@ -512,6 +512,7 @@ private:
    B1(fma)
    B2(ldexp)
    B2(frexp)
+   B1(uaddCarry)
 #undef B0
 #undef B1
 #undef B2
@@ -1838,6 +1839,12 @@ builtin_builder::create_builtins()
                 _frexp(glsl_type::vec3_type,  glsl_type::ivec3_type),
                 _frexp(glsl_type::vec4_type,  glsl_type::ivec4_type),
                 NULL);
+   add_function("uaddCarry",
+                _uaddCarry(glsl_type::uint_type),
+                _uaddCarry(glsl_type::uvec2_type),
+                _uaddCarry(glsl_type::uvec3_type),
+                _uaddCarry(glsl_type::uvec4_type),
+                NULL);
 #undef F
 #undef FI
 #undef FIU
@@ -3584,6 +3591,20 @@ builtin_builder::_frexp(const glsl_type *x_type, const glsl_type *exp_type)
 
    return sig;
 }
+
+ir_function_signature *
+builtin_builder::_uaddCarry(const glsl_type *type)
+{
+   ir_variable *x = in_var(type, "x");
+   ir_variable *y = in_var(type, "y");
+   ir_variable *carry = out_var(type, "carry");
+   MAKE_SIG(type, gpu_shader5, 3, x, y, carry);
+
+   body.emit(assign(carry, ir_builder::carry(x, y)));
+   body.emit(ret(add(x, y)));
+
+   return sig;
+}
 /** @} */
 
 /******************************************************************************/
-- 
1.8.3.2