[Mesa-dev] [PATCH] i965: Don't force pre-Gen6 varying pull loads to use uncompressed SENDs.

[Kenneth Graunke]

Prior to commit b207e88b25e526d0f1ada7b19605b880a27866dc (i965/fs:
Support pull parameters in SIMD16 mode.), we only supported pull
constants in SIMD8 mode.  SIMD8 shaders are always uncompressed, so
forcing this SEND to be uncompressed should have had no effect.

However, once we began supporting pull constants in SIMD16 mode, it
began to matter: it really ought to be compressed in SIMD16 mode.

Fixes Piglit's glsl-fs-normalmatrix, glsl-fs-uniform-array-2,
glsl-fs-uniform-array-6, adn glsl-fs-uniform-array-7 on Ironlake,
which regressed with the aforementioned commit.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e590bdf..2122c04 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -911,7 +911,6 @@ fs_generator::generate_varying_pull_constant_load(fs_inst *inst,
    gen6_resolve_implied_move(p, &header, inst->base_mrf);
 
    struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
-   send->header.compression_control = BRW_COMPRESSION_NONE;
    brw_set_dest(p, send, dst);
    brw_set_src0(p, send, header);
    if (brw->gen < 6)
-- 
1.9.2