[Mesa-dev] [PATCH] i965/fs: Implement fs_inst::force_sechalf support on Broadwell.

[Kenneth Graunke]

Back when I originally wrote this code, force_sechalf was only used for
Gen4 code, so I didn't bother hooking it up.  However, it's used more
generally these days.  In particular, we use it for computing
gl_SamplePosition.

Fixes Piglit's spec/ARB_sample_shading/builtin-gl-sample-position tests.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/gen8_fs_generator.cpp | 10 ++++++----
 src/mesa/drivers/dri/i965/gen8_generator.cpp    |  1 +
 src/mesa/drivers/dri/i965/gen8_generator.h      |  1 +
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index ef95eb0..7fb81c7 100644
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -927,10 +927,12 @@ gen8_fs_generator::generate_code(exec_list *instructions)
       else
          default_state.exec_size = BRW_EXECUTE_8;
 
-      /* fs_inst::force_sechalf is only used for original Gen4 code, so we
-       * don't handle it.  Add qtr_control to default_state if that changes.
-       */
-      assert(!ir->force_sechalf);
+      if (ir->force_uncompressed || dispatch_width == 8)
+         default_state.qtr_control = GEN6_COMPRESSION_1Q;
+      else if (ir->force_sechalf)
+         default_state.qtr_control = GEN6_COMPRESSION_2Q;
+      else
+         default_state.qtr_control = GEN6_COMPRESSION_1H;
 
       switch (ir->opcode) {
       case BRW_OPCODE_MOV:
diff --git a/src/mesa/drivers/dri/i965/gen8_generator.cpp b/src/mesa/drivers/dri/i965/gen8_generator.cpp
index b082008..dd434a7 100644
--- a/src/mesa/drivers/dri/i965/gen8_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_generator.cpp
@@ -87,6 +87,7 @@ gen8_generator::next_inst(unsigned opcode)
    gen8_set_exec_size(inst, default_state.exec_size);
    gen8_set_access_mode(inst, default_state.access_mode);
    gen8_set_mask_control(inst, default_state.mask_control);
+   gen8_set_qtr_control(inst, default_state.qtr_control);
    gen8_set_cond_modifier(inst, default_state.conditional_mod);
    gen8_set_pred_control(inst, default_state.predicate);
    gen8_set_pred_inv(inst, default_state.predicate_inverse);
diff --git a/src/mesa/drivers/dri/i965/gen8_generator.h b/src/mesa/drivers/dri/i965/gen8_generator.h
index 1f4b7f8..b144809 100644
--- a/src/mesa/drivers/dri/i965/gen8_generator.h
+++ b/src/mesa/drivers/dri/i965/gen8_generator.h
@@ -186,6 +186,7 @@ protected:
       unsigned exec_size;
       unsigned access_mode;
       unsigned mask_control;
+      unsigned qtr_control;
       unsigned flag_subreg_nr;
       unsigned conditional_mod;
       unsigned predicate;
-- 
1.9.1