[Mesa-dev] [PATCH 07/13] r600g: fix MSAA resolve on R6xx when the destination is 1D-tiled

Alex Deucher alexdeucher at gmail.com
Mon Apr 21 08:24:21 PDT 2014


On Sun, Apr 20, 2014 at 9:59 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> Cc: 10.0 10.1 mesa-stable at lists.freedesktop.org

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  src/gallium/drivers/radeon/r600_texture.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
> index c410543..55caece 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -289,6 +289,12 @@ void r600_texture_get_fmask_info(struct r600_common_screen *rscreen,
>         fmask.nsamples = 1;
>         fmask.flags |= RADEON_SURF_FMASK;
>
> +       /* Force 2D tiling if it wasn't set. This may occur when creating
> +        * FMASK for MSAA resolve on R6xx. On R6xx, the single-sample
> +        * destination buffer must have an FMASK too. */
> +       fmask.flags = RADEON_SURF_CLR(fmask.flags, MODE);
> +       fmask.flags |= RADEON_SURF_SET(RADEON_SURF_MODE_2D, MODE);
> +
>         if (rscreen->chip_class >= SI) {
>                 fmask.flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
>         }
> --
> 1.8.3.2
>
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