[Mesa-dev] [PATCH] i965/brw_reg: struct constructor now needs explicit negate and abs values.
Andres Gomez
agomez at igalia.com
Fri Dec 12 08:19:07 PST 2014
We were asuming, when constructing a new brw_reg struct, that the
negate and abs register modifiers would not be present by default in
the new register.
Now, we force explicitly setting these values when constructing a new
register.
This will avoid problems like forgetting to properly set them when we
are using a previous register to generate this new register, as it was
happening in the dFdx and dFdy generation functions.
Fixes piglit test shaders/glsl-deriv-varyings
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82991
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 6 ++++++
src/mesa/drivers/dri/i965/brw_reg.h | 22 ++++++++++++++++++++--
src/mesa/drivers/dri/i965/brw_vec4.cpp | 2 ++
3 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index bbed4cc..6657f22 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -725,12 +725,14 @@ fs_generator::generate_ddx(enum opcode opcode,
}
struct brw_reg src0 = brw_reg(src.file, src.nr, 1,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
vstride,
width,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
struct brw_reg src1 = brw_reg(src.file, src.nr, 0,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
vstride,
width,
@@ -775,12 +777,14 @@ fs_generator::generate_ddy(enum opcode opcode,
/* produce accurate derivatives */
struct brw_reg src0 = brw_reg(src.file, src.nr, 0,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_1,
BRW_SWIZZLE_XYXY, WRITEMASK_XYZW);
struct brw_reg src1 = brw_reg(src.file, src.nr, 0,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
@@ -809,12 +813,14 @@ fs_generator::generate_ddy(enum opcode opcode,
} else {
/* replicate the derivative at the top-left pixel to other pixels */
struct brw_reg src0 = brw_reg(src.file, src.nr, 0,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
BRW_HORIZONTAL_STRIDE_0,
BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
struct brw_reg src1 = brw_reg(src.file, src.nr, 2,
+ src.negate, src.abs,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 175554b..a04149c 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -218,6 +218,8 @@ type_is_signed(unsigned type)
* \param file one of the BRW_x_REGISTER_FILE values
* \param nr register number/index
* \param subnr register sub number
+ * \param negate register negate modifier
+ * \param abs register abs modifier
* \param type one of BRW_REGISTER_TYPE_x
* \param vstride one of BRW_VERTICAL_STRIDE_x
* \param width one of BRW_WIDTH_x
@@ -229,6 +231,8 @@ static inline struct brw_reg
brw_reg(unsigned file,
unsigned nr,
unsigned subnr,
+ unsigned negate,
+ unsigned abs,
enum brw_reg_type type,
unsigned vstride,
unsigned width,
@@ -248,8 +252,8 @@ brw_reg(unsigned file,
reg.file = file;
reg.nr = nr;
reg.subnr = subnr * type_sz(type);
- reg.negate = 0;
- reg.abs = 0;
+ reg.negate = negate;
+ reg.abs = abs;
reg.vstride = vstride;
reg.width = width;
reg.hstride = hstride;
@@ -276,6 +280,8 @@ brw_vec16_reg(unsigned file, unsigned nr, unsigned subnr)
return brw_reg(file,
nr,
subnr,
+ 0,
+ 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_16,
BRW_WIDTH_16,
@@ -291,6 +297,8 @@ brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr)
return brw_reg(file,
nr,
subnr,
+ 0,
+ 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_8,
BRW_WIDTH_8,
@@ -306,6 +314,8 @@ brw_vec4_reg(unsigned file, unsigned nr, unsigned subnr)
return brw_reg(file,
nr,
subnr,
+ 0,
+ 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_4,
BRW_WIDTH_4,
@@ -321,6 +331,8 @@ brw_vec2_reg(unsigned file, unsigned nr, unsigned subnr)
return brw_reg(file,
nr,
subnr,
+ 0,
+ 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_2,
BRW_WIDTH_2,
@@ -336,6 +348,8 @@ brw_vec1_reg(unsigned file, unsigned nr, unsigned subnr)
return brw_reg(file,
nr,
subnr,
+ 0,
+ 0,
BRW_REGISTER_TYPE_F,
BRW_VERTICAL_STRIDE_0,
BRW_WIDTH_1,
@@ -437,6 +451,8 @@ brw_imm_reg(enum brw_reg_type type)
return brw_reg(BRW_IMMEDIATE_VALUE,
0,
0,
+ 0,
+ 0,
type,
BRW_VERTICAL_STRIDE_0,
BRW_WIDTH_1,
@@ -630,6 +646,8 @@ brw_ip_reg(void)
return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_IP,
0,
+ 0,
+ 0,
BRW_REGISTER_TYPE_UD,
BRW_VERTICAL_STRIDE_4, /* ? */
BRW_WIDTH_1,
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 18a3369..5eb9e20 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1527,6 +1527,8 @@ vec4_visitor::get_timestamp()
src_reg ts = src_reg(brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
BRW_ARF_TIMESTAMP,
0,
+ 0,
+ 0,
BRW_REGISTER_TYPE_UD,
BRW_VERTICAL_STRIDE_0,
BRW_WIDTH_4,
--
1.9.1
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