[Mesa-dev] [PATCH 2/3] d3d10: allow indirect addressing on outputs

[Zack Rusin]

Outputs can have relative addressing. This adds basic support for it.

Signed-off-by: Zack Rusin <zackr at vmware.com>
---
 src/gallium/state_trackers/d3d10/ShaderTGSI.c | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/d3d10/ShaderTGSI.c b/src/gallium/state_trackers/d3d10/ShaderTGSI.c
index 2e42b8b..1cf9e0e 100644
--- a/src/gallium/state_trackers/d3d10/ShaderTGSI.c
+++ b/src/gallium/state_trackers/d3d10/ShaderTGSI.c
@@ -687,20 +687,26 @@ translate_operand(struct Shader_xlate *sx,
 
    case D3D10_SB_OPERAND_TYPE_OUTPUT:
       assert(operand->index_dim == 1);
-      assert(operand->index[0].index_rep == D3D10_SB_OPERAND_INDEX_IMMEDIATE32);
       assert(operand->index[0].imm < SHADER_MAX_OUTPUTS);
 
-      if (!writemask) {
-         reg = sx->outputs[operand->index[0].imm].reg[0];
-      } else {
-         unsigned i;
-         for (i = 0; i < 4; ++i) {
-            unsigned mask = 1 << i;
-            if ((writemask & mask)) {
-               reg = sx->outputs[operand->index[0].imm].reg[i];
-               break;
+      if (operand->index[0].index_rep == D3D10_SB_OPERAND_INDEX_IMMEDIATE32) {
+         if (!writemask) {
+            reg = sx->outputs[operand->index[0].imm].reg[0];
+         } else {
+            unsigned i;
+            for (i = 0; i < 4; ++i) {
+               unsigned mask = 1 << i;
+               if ((writemask & mask)) {
+                  reg = sx->outputs[operand->index[0].imm].reg[i];
+                  break;
+               }
             }
          }
+      } else {
+         struct ureg_src addr =
+            translate_relative_operand(sx, &operand->index[0].rel);
+         assert(operand->index[0].index_rep == D3D10_SB_OPERAND_INDEX_IMMEDIATE32_PLUS_RELATIVE);
+         reg = ureg_dst_indirect(sx->outputs[operand->index[0].imm].reg[0], addr);
       }
       break;
 
-- 
1.8.3.2