[Mesa-dev] [PATCH 7/7] i965/blorp: handle tile offsets for all sources in the program

Topi Pohjolainen topi.pohjolainen at intel.com
Mon Feb 10 11:53:15 PST 2014


Note that hiz and clear programs need no consideration here as
they do not use any source surfaces.

No regressions on IVB and SNB.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp  | 10 ++++++----
 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 18 ++++--------------
 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 17 ++++-------------
 3 files changed, 14 insertions(+), 31 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 355552d..92bb037 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -190,8 +190,8 @@ brw_blorp_surface_info::compute_page_offset() const
 void
 brw_blorp_params::configure_miplevel_offsets()
 {
-   uint32_t src_tile_orig_space_x = 0;
-   uint32_t src_tile_orig_space_y = 0;
+   uint32_t src_tile_orig_space_x;
+   uint32_t src_tile_orig_space_y;
    uint32_t dst_tile_orig_space_x;
    uint32_t dst_tile_orig_space_y;
 
@@ -204,11 +204,13 @@ brw_blorp_params::configure_miplevel_offsets()
       dst_tile_orig_space_y = dst.tile_y;
    }
 
+   src.compute_tile_offsets(&src.tile_x, &src.tile_y);
    if (src.map_stencil_as_y_tiled) {
-      src.compute_tile_offsets(&src.tile_x, &src.tile_y);
-
       src_tile_orig_space_x = src.tile_x / 2;
       src_tile_orig_space_y = src.tile_y * 2;
+   } else {
+      src_tile_orig_space_x = src.tile_x;
+      src_tile_orig_space_y = src.tile_y;
    }
 
    /* Compensate for the adjusted destination offsets when calculating the
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index c89ec86..4614e7f 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -391,13 +391,11 @@ gen6_blorp_emit_surface_state(struct brw_context *brw,
    /* reloc */
    surf[1] = surface->compute_page_offset() + region->bo->offset64;
 
-   /* When the tile offsets are handled by the blorp program directly the
-    * dimensions of the surface need to be updated to allow full access.
+   /* Tile offsets are handled by the blorp program directly and therefore
+    * the dimensions of the surface need to be updated to allow full access.
     */
-   if (surface->map_stencil_as_y_tiled || &params->dst == surface) {
-      width += surface->tile_x;
-      height += surface->tile_y;
-   }
+   width += surface->tile_x;
+   height += surface->tile_y;
    surf[2] = (0 << BRW_SURFACE_LOD_SHIFT |
               (width - 1) << BRW_SURFACE_WIDTH_SHIFT |
               (height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
@@ -416,14 +414,6 @@ gen6_blorp_emit_surface_state(struct brw_context *brw,
    surf[5] = (surface->mt->align_h == 4 ?
               BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0);
 
-   if (!surface->map_stencil_as_y_tiled && &params->dst != surface) {
-      uint32_t tile_x, tile_y;
-
-      surface->compute_tile_offsets(&tile_x, &tile_y);
-      surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) |
-                  SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET));
-   }
-
    /* Emit relocation to surface contents */
    drm_intel_bo_emit_reloc(brw->batch.bo,
                            wm_surf_offset + 4,
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 8488e26..53c0e15 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -178,20 +178,11 @@ gen7_blorp_emit_surface_state(struct brw_context *brw,
 
    surf[5] = SET_FIELD(mocs, GEN7_SURFACE_MOCS);
 
-   /* When the tile offsets are handled by the blorp program directly the
-    * dimensions of the surface need to be updated to allow full access.
+   /* Tile offsets are handled by the blorp program directly and therefore
+    * the dimensions of the surface need to be updated to allow full access.
     */
-   if (surface->map_stencil_as_y_tiled || is_render_target) {
-      width += surface->tile_x;
-      height += surface->tile_y;
-   } else {
-      uint32_t tile_x, tile_y;
-
-      surface->compute_tile_offsets(&tile_x, &tile_y);
-      surf[5] |= (SET_FIELD(tile_x / 4, BRW_SURFACE_X_OFFSET) |
-                  SET_FIELD(tile_y / 2, BRW_SURFACE_Y_OFFSET));
-   }
-
+   width += surface->tile_x;
+   height += surface->tile_y;
    surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
              SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
 
-- 
1.8.3.1



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