[Mesa-dev] [PATCH 32/40] i965: Set the maximum VPIndex
Kenneth Graunke
kenneth at whitecape.org
Fri Jan 10 18:05:52 PST 2014
On 01/10/2014 05:40 PM, Ian Romanick wrote:
> From: Ian Romanick <ian.d.romanick at intel.com>
>
> At various stages the hardware clamps the gl_ViewportIndex to these
> values. Setting them to zero effectively makes gl_ViewportIndex be
> ignored. This is acutally useful in blorp (so that we don't have to
> modify all of the viewport / scissor state).
>
> Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 1 +
> src/mesa/drivers/dri/i965/brw_gs_state.c | 2 ++
> src/mesa/drivers/dri/i965/gen6_clip_state.c | 3 ++-
> 3 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index 142b2db..2eb31e7 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -1537,6 +1537,7 @@ enum brw_message_target {
> # define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17
> # define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6
> # define GEN6_CLIP_FORCE_ZERO_RTAINDEX (1 << 5)
> +# define GEN6_CLIP_MAX_VP_INDEX_MASK (GEN7_NUM_VIEWPORTS-1)
This should be:
# define GEN6_CLIP_MAX_VP_INDEX_MASK INTEL_MASK(3, 0)
>
> #define _3DSTATE_SF 0x7813 /* GEN6+ */
> /* DW1 (for gen6) */
> diff --git a/src/mesa/drivers/dri/i965/brw_gs_state.c b/src/mesa/drivers/dri/i965/brw_gs_state.c
> index da8449c..4a2e643 100644
> --- a/src/mesa/drivers/dri/i965/brw_gs_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_gs_state.c
> @@ -83,6 +83,8 @@ brw_upload_gs_unit(struct brw_context *brw)
> if (unlikely(INTEL_DEBUG & DEBUG_STATS))
> gs->thread4.stats_enable = 1;
>
> + gs->gs6.max_vp_index = brw->ctx.Const.MaxViewports - 1;
> +
This hunk only applies to Gen4-5, so technically it's not necessary, and
I don't know that we'll ever support ARB_viewport_array on that
hardware. But I suppose it doesn't hurt either, so you may as well
leave it.
> brw->state.dirty.cache |= CACHE_NEW_FF_GS_UNIT;
> }
>
> diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
> index e4dc278..3499e37 100644
> --- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
> @@ -121,7 +121,8 @@ upload_clip_state(struct brw_context *brw)
> dw2);
> OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
> U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
> - (fb->MaxNumLayers > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX));
> + (fb->MaxNumLayers > 0 ? 0 : GEN6_CLIP_FORCE_ZERO_RTAINDEX) |
> + ((ctx->Const.MaxViewports - 1) & GEN6_CLIP_MAX_VP_INDEX_MASK));
> ADVANCE_BATCH();
> }
>
>
More information about the mesa-dev
mailing list