[Mesa-dev] [PATCH 3/6] radeonsi: add support for fine-grained sampler view updates

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_blit.c        | 14 +++++------
 src/gallium/drivers/radeonsi/si_descriptors.c | 36 +++++++++++----------------
 src/gallium/drivers/radeonsi/si_pipe.h        |  1 -
 3 files changed, 21 insertions(+), 30 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index a76d905..9b01867 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -74,9 +74,7 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
 			sctx->blitter, 2,
 			sctx->samplers[PIPE_SHADER_FRAGMENT].states.saved_states);
 
-		util_blitter_save_fragment_sampler_views(sctx->blitter,
-			util_last_bit(sctx->samplers[PIPE_SHADER_FRAGMENT].views.desc.enabled_mask &
-				      ((1 << SI_NUM_USER_SAMPLERS) - 1)),
+		util_blitter_save_fragment_sampler_views(sctx->blitter, 2,
 			sctx->samplers[PIPE_SHADER_FRAGMENT].views.views);
 	}
 
@@ -227,17 +225,19 @@ void si_flush_depth_textures(struct si_context *sctx,
 			     struct si_textures_info *textures)
 {
 	unsigned i;
+	unsigned mask = textures->depth_texture_mask;
 
-	for (i = 0; i < textures->n_views; ++i) {
+	while (mask) {
 		struct pipe_sampler_view *view;
 		struct r600_texture *tex;
 
+		i = u_bit_scan(&mask);
+
 		view = textures->views.views[i];
-		if (!view) continue;
+		assert(view);
 
 		tex = (struct r600_texture *)view->texture;
-		if (!tex->is_depth || tex->is_flushing_texture)
-			continue;
+		assert(tex->is_depth && !tex->is_flushing_texture);
 
 		si_blit_decompress_depth_in_place(sctx, tex,
 						  view->u.tex.first_level, view->u.tex.last_level,
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 991f048..a4e14a1 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -374,56 +374,48 @@ static void si_set_sampler_views(struct pipe_context *ctx,
 	struct si_pipe_sampler_view **rviews = (struct si_pipe_sampler_view **)views;
 	int i;
 
-	if (shader >= SI_NUM_SHADERS)
+	if (!count || shader >= SI_NUM_SHADERS)
 		return;
 
-	assert(start == 0);
-
 	for (i = 0; i < count; i++) {
+		unsigned slot = start + i;
+
 		if (!views[i]) {
-			samplers->depth_texture_mask &= ~(1 << i);
-			samplers->compressed_colortex_mask &= ~(1 << i);
-			si_set_sampler_view(sctx, shader, i, NULL, NULL);
-			si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i,
+			samplers->depth_texture_mask &= ~(1 << slot);
+			samplers->compressed_colortex_mask &= ~(1 << slot);
+			si_set_sampler_view(sctx, shader, slot, NULL, NULL);
+			si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + slot,
 					    NULL, NULL);
 			continue;
 		}
 
-		si_set_sampler_view(sctx, shader, i, views[i], rviews[i]->state);
+		si_set_sampler_view(sctx, shader, slot, views[i], rviews[i]->state);
 
 		if (views[i]->texture->target != PIPE_BUFFER) {
 			struct r600_texture *rtex =
 				(struct r600_texture*)views[i]->texture;
 
 			if (rtex->is_depth && !rtex->is_flushing_texture) {
-				samplers->depth_texture_mask |= 1 << i;
+				samplers->depth_texture_mask |= 1 << slot;
 			} else {
-				samplers->depth_texture_mask &= ~(1 << i);
+				samplers->depth_texture_mask &= ~(1 << slot);
 			}
 			if (rtex->cmask.size || rtex->fmask.size) {
-				samplers->compressed_colortex_mask |= 1 << i;
+				samplers->compressed_colortex_mask |= 1 << slot;
 			} else {
-				samplers->compressed_colortex_mask &= ~(1 << i);
+				samplers->compressed_colortex_mask &= ~(1 << slot);
 			}
 
 			if (rtex->fmask.size) {
-				si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i,
+				si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + slot,
 						    views[i], rviews[i]->fmask_state);
 			} else {
-				si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i,
+				si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + slot,
 						    NULL, NULL);
 			}
 		}
 	}
-	for (; i < samplers->n_views; i++) {
-		samplers->depth_texture_mask &= ~(1 << i);
-		samplers->compressed_colortex_mask &= ~(1 << i);
-		si_set_sampler_view(sctx, shader, i, NULL, NULL);
-		si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i,
-				    NULL, NULL);
-	}
 
-	samplers->n_views = count;
 	sctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE;
 	si_update_descriptors(sctx, &samplers->views.desc);
 }
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 46ea7dd..94c6c5c 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -68,7 +68,6 @@ struct si_cs_shader_state {
 struct si_textures_info {
 	struct si_sampler_views		views;
 	struct si_sampler_states	states;
-	unsigned			n_views;
 	uint32_t			depth_texture_mask; /* which textures are depth */
 	uint32_t			compressed_colortex_mask;
 };
-- 
1.9.1