[Mesa-dev] [PATCH 08/14] i965/gen8: Use intel_miptree_aux_buffer for auxiliary buffer
Jordan Justen
jordan.l.justen at intel.com
Tue Jul 15 18:32:16 PDT 2014
This will allow us to treat HiZ and MCS the same when using them as
auxiliary surface buffers.
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 28 +++++++++++++-------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index c9b0842..87f0d49 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -132,7 +132,7 @@ gen8_update_texture_surface(struct gl_context *ctx,
struct intel_mipmap_tree *mt = intelObj->mt;
struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
- struct intel_mipmap_tree *aux_mt = NULL;
+ struct intel_miptree_aux_buffer *aux_buf = NULL;
uint32_t aux_mode = 0;
mesa_format format = intelObj->_Format;
@@ -156,7 +156,7 @@ gen8_update_texture_surface(struct gl_context *ctx,
}
if (mt->mcs_buf) {
- aux_mt = mt->mcs_buf->mt;
+ aux_buf = mt->mcs_buf;
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
}
@@ -202,9 +202,9 @@ gen8_update_texture_surface(struct gl_context *ctx,
GEN7_SURFACE_MIN_LOD) |
(intelObj->_MaxLevel - tObj->BaseLevel); /* mip count */
- if (aux_mt) {
+ if (aux_buf) {
surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
- SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
+ SET_FIELD((aux_buf->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
aux_mode;
} else {
surf[6] = 0;
@@ -230,10 +230,10 @@ gen8_update_texture_surface(struct gl_context *ctx,
*((uint64_t *) &surf[8]) = mt->bo->offset64 + mt->offset; /* reloc */
- if (aux_mt) {
- *((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
+ if (aux_buf) {
+ *((uint64_t *) &surf[10]) = aux_buf->bo->offset64;
drm_intel_bo_emit_reloc(brw->batch.bo, *surf_offset + 10 * 4,
- aux_mt->bo, 0,
+ aux_buf->bo, 0,
I915_GEM_DOMAIN_SAMPLER, 0);
} else {
surf[10] = 0;
@@ -308,7 +308,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
- struct intel_mipmap_tree *aux_mt = NULL;
+ struct intel_miptree_aux_buffer *aux_buf = NULL;
uint32_t aux_mode = 0;
unsigned width = mt->logical_width0;
unsigned height = mt->logical_height0;
@@ -363,7 +363,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
}
if (mt->mcs_buf) {
- aux_mt = mt->mcs_buf->mt;
+ aux_buf = mt->mcs_buf;
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
}
@@ -393,9 +393,9 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
surf[5] = irb->mt_level - irb->mt->first_level;
- if (aux_mt) {
+ if (aux_buf) {
surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
- SET_FIELD((aux_mt->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
+ SET_FIELD((aux_buf->pitch / 128) - 1, GEN8_SURFACE_AUX_PITCH) |
aux_mode;
} else {
surf[6] = 0;
@@ -409,11 +409,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
*((uint64_t *) &surf[8]) = mt->bo->offset64; /* reloc */
- if (aux_mt) {
- *((uint64_t *) &surf[10]) = aux_mt->bo->offset64;
+ if (aux_buf) {
+ *((uint64_t *) &surf[10]) = aux_buf->bo->offset64;
drm_intel_bo_emit_reloc(brw->batch.bo,
brw->wm.base.surf_offset[surf_index] + 10 * 4,
- aux_mt->bo, 0,
+ aux_buf->bo, 0,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER);
} else {
surf[10] = 0;
--
2.0.0
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