[Mesa-dev] [PATCH 4/5] r600g, radeonsi: Use write-combined persistent GTT mappings

[Grigori Goronzy]

On 17.07.2014 12:01, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
> 
> This is hopefully safe: The kernel makes sure writes to these mappings
> finish before the GPU might start reading from them, and the GPU caches
> are invalidated at the start of a command stream.
>

Aren't CPU reads from write-combined GTT memory extraordinarily slow,
because they're uncached? And don't you need the right access patterns
to make write combining perform well?

Grigori

> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  src/gallium/drivers/radeon/r600_buffer_common.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
> index 40917f0..c8a0723 100644
> --- a/src/gallium/drivers/radeon/r600_buffer_common.c
> +++ b/src/gallium/drivers/radeon/r600_buffer_common.c
> @@ -131,7 +131,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
>  	    res->b.b.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT |
>  			      PIPE_RESOURCE_FLAG_MAP_COHERENT)) {
>  		res->domains = RADEON_DOMAIN_GTT;
> -		flags = 0;
> +		flags = RADEON_FLAG_GTT_WC;
>  	}
>  
>  	/* Tiled textures are unmappable. Always put them in VRAM. */
> 


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