[Mesa-dev] [PATCH 00/17] Gen6 render surface state changes

[Jordan Justen]

The goal for this series was to allow layered rendering to work with
gen6. On gen6, it also fixes 10 failing piglit tests, 54 crashing
piglit tests, and a performance regression bug
(https://bugs.freedesktop.org/show_bug.cgi?id=56127).

This series is available on my gen6-layered branch in
git://people.freedesktop.org/~jljusten/mesa

On gm45, the previous version of series had no piglit changes, but I
did not test this version.

Jordan Justen (17):
  i965: Split gen6 renderbuffer surface state from gen5 and older
  i965/gen6: add support for layered renderbuffers
  i965/gen6: Adjust render height in errata case for MSAA
  i965: Split gen6 depth hiz state out from brw
  i965/gen6 depth surface: calculate more specific surface type
  i965/gen6 depth surface: calculate depth (array size) for depth
    surface
  i965/gen6 depth surface: calculate LOD being rendered to
  i965/gen6 depth surface: calculate minimum array element being
    rendered
  i965/gen6 blorp depth: calculate base surface width/height
  i965/gen6 fbo: make unmatched depth/stencil configs return unsupported
  i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of
    surface
  i965: Rename array_spacing_lod0 to non_mip_arrays
  i965: Allow forcing non-mipmapped array spacing miptree layout
  i965: Support non_mip_arrays for multiple miplevels
  i965/gen6: Force tile alignment for each stencil/hiz LOD
  i965/gen6: Stencil/hiz needs an offset for LOD > 0
  i965/gen6: Force non_mip_arrays for separate stencil/hiz

 src/mesa/drivers/dri/i965/Makefile.sources        |   2 +
 src/mesa/drivers/dri/i965/brw_blorp.cpp           |   2 +-
 src/mesa/drivers/dri/i965/brw_blorp.h             |   2 +-
 src/mesa/drivers/dri/i965/brw_context.c           |   4 +
 src/mesa/drivers/dri/i965/brw_context.h           |  10 +
 src/mesa/drivers/dri/i965/brw_defines.h           |   4 +
 src/mesa/drivers/dri/i965/brw_misc_state.c        |   4 +-
 src/mesa/drivers/dri/i965/brw_state.h             |   3 +
 src/mesa/drivers/dri/i965/brw_tex_layout.c        |  62 ++++-
 src/mesa/drivers/dri/i965/gen6_blorp.cpp          | 115 +++++----
 src/mesa/drivers/dri/i965/gen6_depth_state.c      | 273 ++++++++++++++++++++++
 src/mesa/drivers/dri/i965/gen6_surface_state.c    | 164 +++++++++++++
 src/mesa/drivers/dri/i965/gen7_blorp.cpp          |   2 +-
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |   6 +-
 src/mesa/drivers/dri/i965/intel_fbo.c             |   7 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c     |  43 ++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h     |   8 +-
 src/mesa/drivers/dri/i965/intel_tex.c             |   3 +-
 src/mesa/drivers/dri/i965/intel_tex_image.c       |   3 +-
 src/mesa/drivers/dri/i965/intel_tex_subimage.c    |   3 +-
 src/mesa/drivers/dri/i965/intel_tex_validate.c    |   3 +-
 21 files changed, 637 insertions(+), 86 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/gen6_depth_state.c
 create mode 100644 src/mesa/drivers/dri/i965/gen6_surface_state.c

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2.0.1