[Mesa-dev] Backends and support for pow-instructions

[Marek Olšák]

BTW, I have just noticed r600g also lowers POW and there is no mention
of POW in the SI ISA guide either, so I don't think radeons would
benefit from an optimization pass that adds POW instructions.

Marek

On Sat, Jul 19, 2014 at 12:15 AM, Marek Olšák <maraeo at gmail.com> wrote:
> All Gallium drivers must support POW, but some drivers like r300-r500
> fragment shaders lower it to LG2+MUL+EX2.
>
> Marek
>
> On Sun, Jul 13, 2014 at 7:50 PM, Thomas Helland
> <thomashelland90 at gmail.com> wrote:
>> Hi all,
>>
>> I've been looking at some shaders from Portal recently.
>> A lot of them seem to hand-roll a pow-function with
>> log2, multiply, and exp2, like this:
>>
>> r3.x = log2( r3.x );
>> r3.y = log2( r3.y );
>> r3.z = log2( r3.z );
>> r3.xyz = r3.xyz * vd2.zzz;
>> r3.x = exp2( r3.x );
>> r3.y = exp2( r3.y );
>> r3.z = exp2( r3.z );
>>
>> The corresponding output from the shader-db run shows:
>>
>>    (assign  (xyz) (var_ref r3)  (expression vec3 log2 (swiz xyz (var_ref r3)
>> )) )
>> 0x000003c8: math log(8)     g27<1>.xyzF     g27<4,4,1>.xyzzF null
>> { align16 WE_normal 1Q compacted };
>>    (assign  (xz) (var_ref r6)  (swiz yy (array_ref (var_ref vc) (constant
>> int (0)) ) ))
>> 0x000003d0: mov(8)          g25<1>.xzF      g1<0,4,1>.yF
>> { align16 WE_normal 1Q };
>>    (assign  (w) (var_ref r0)  (expression float + (expression float dot
>> (swiz xyz (array_ref (var_ref vc) (constant int (28)) ) )(expression vec3
>> neg (swiz xyz (var_ref r5) )) ) (expression float neg (swiz z (array_ref
>> (var_ref vc) (constant int (30)) ) )) ) )
>> 0x000003e0: dp3(8)          g105<1>.xF      g5.4<0,4,1>.xyzzF
>> -g26<4,4,1>.xyzzF { align16 WE_normal 1Q };
>>    (assign  (xyz) (var_ref r0)  (expression vec3 + (expression vec3 * (swiz
>> xyz (var_ref r0) )(expression vec3 neg (swiz xxx (var_ref
>> inversesqrt_retval) )) ) (expression vec3 neg (swiz xyz (array_ref (var_ref
>> vc) (constant int (28)) ) )) ) )
>> 0x000003f0: mad(8)          g30<1>.xyzF     g108<4,4,1>F.xyzz
>> g30<4,4,1>F.xyzz -g97<4,4,1>F.x { align16 WE_normal 1Q };
>>    (assign  (xyz) (var_ref r6)  (expression vec3 * (swiz yxx (var_ref r7)
>> )(swiz xyz (var_ref r6) )) )
>> 0x00000400: mul(8)          g25<1>.xyzF     g24<4,4,1>.yxxxF
>> g25<4,4,1>.xyzzF { align16 WE_normal 1Q };
>>    (assign  (xyz) (var_ref r3)  (expression vec3 * (swiz xyz (var_ref r3)
>> )(constant vec3 (2.200000 2.200000 2.200000)) ) )
>> 0x00000410: mul(8)          g27<1>.xyzF     g27<4,4,1>.xyzzF 2.2F
>> { align16 WE_normal 1Q };
>>    (assign  (w) (var_ref r0)  (expression float + (expression float dot
>> (swiz xyz (array_ref (var_ref vc) (constant int (28)) ) )(expression vec3
>> neg (swiz xyz (var_ref r5) )) ) (expression float neg (swiz z (array_ref
>> (var_ref vc) (constant int (30)) ) )) ) )
>> 0x00000420: add(8)          g107<1>.xF      g105<4,4,1>.xF  -g6.4<0,4,1>.zF
>> { align16 WE_normal 1Q };
>>    (assign  (xyz) (var_ref r0)  (expression vec3 + (expression vec3 * (swiz
>> www (array_ref (var_ref vc) (constant int (27)) ) )(swiz xyz (var_ref r0) ))
>> (swiz xyz (var_ref r5) )) )
>> 0x00000430: mad(8)          g30<1>.xyzF     g26<4,4,1>F.xyzz g5.3<0,1,0>F.w
>> g30<4,4,1>F.xyzz { align16 WE_normal 1Q };
>>    (assign  (x) (var_ref dot_retval)  (expression float dot (swiz xyz
>> (array_ref (var_ref vc) (constant int (31)) ) )(swiz xyz (var_ref r6) )) )
>> 0x00000440: dp3(8)          g18<1>.xF       g7<0,4,1>.xyzzF g25<4,4,1>.xyzzF
>> { align16 WE_normal 1Q compacted };
>>    (assign  (xyz) (var_ref r3)  (expression vec3 exp2 (swiz xyz (var_ref r3)
>> )) )
>> 0x00000448: math exp(8)     g27<1>.xyzF     g27<4,4,1>.xyzzF null
>> { align16 WE_normal 1Q compacted };
>>
>>
>> As far as I've been able to understand, the i965 hardware
>> has a pow() instruction, how is this with other hardware?
>>
>> I've considered writing an algebraic optimization to convert
>> this into an ir_binop_pow. If my understanding is correct the backend
>> will then implement this in a similar fashion as above if it does not
>> have a native pow() instruction.
>>
>> If, on the other hand, we have a pow() instruction, my guess is
>> we'd see reduced instruction-counts.
>>
>> Is my understanding correct? Is this something that's worth doing?
>>
>> regards,
>> Thomas Helland
>>
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