[Mesa-dev] [PATCH 3/3] radeonsi: fix a hang with streamout on Hawaii

[Alex Deucher]

On Fri, Jul 25, 2014 at 9:30 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> I actually couldn't reproduce this one, but internal docs recommend this
> workaround. Better safe than sorry.
>
> Also, the number of dwords for the sync packets is increased by 4 instead
> of 2, because it wasn't bumped last time when a new packet was added there.
>
> Cc: mesa-stable at lists.freedesktop.org

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  src/gallium/drivers/radeon/r600_pipe_common.h |  1 +
>  src/gallium/drivers/radeonsi/si_state_draw.c  | 14 +++++++++++++-
>  2 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
> index 5348b8d..dcec2bb 100644
> --- a/src/gallium/drivers/radeon/r600_pipe_common.h
> +++ b/src/gallium/drivers/radeon/r600_pipe_common.h
> @@ -72,6 +72,7 @@
>  #define R600_CONTEXT_WAIT_3D_IDLE              (1 << 17)
>  #define R600_CONTEXT_WAIT_CP_DMA_IDLE          (1 << 18)
>  #define R600_CONTEXT_VGT_FLUSH                 (1 << 19)
> +#define R600_CONTEXT_VGT_STREAMOUT_SYNC                (1 << 20)
>
>  /* Debug flags. */
>  /* logging */
> diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
> index 1816540..eb21ba1 100644
> --- a/src/gallium/drivers/radeonsi/si_state_draw.c
> +++ b/src/gallium/drivers/radeonsi/si_state_draw.c
> @@ -868,11 +868,15 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
>                 radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>                 radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_FLUSH) | EVENT_INDEX(0));
>         }
> +       if (sctx->flags & R600_CONTEXT_VGT_STREAMOUT_SYNC) {
> +               radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
> +               radeon_emit(cs, EVENT_TYPE(V_028A90_VGT_STREAMOUT_SYNC) | EVENT_INDEX(0));
> +       }
>
>         sctx->flags = 0;
>  }
>
> -const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 13 }; /* number of CS dwords */
> +const struct r600_atom si_atom_cache_flush = { si_emit_cache_flush, 17 }; /* number of CS dwords */
>
>  static void si_get_draw_start_count(struct si_context *sctx,
>                                     const struct pipe_draw_info *info,
> @@ -985,6 +989,14 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
>         }
>  #endif
>
> +       /* Workaround for a VGT hang when streamout is enabled.
> +        * It must be done after drawing. */
> +       if (sctx->b.family == CHIP_HAWAII &&
> +           (sctx->b.streamout.streamout_enabled ||
> +            sctx->b.streamout.prims_gen_query_enabled)) {
> +               sctx->b.flags |= R600_CONTEXT_VGT_STREAMOUT_SYNC;
> +       }
> +
>         /* Set the depth buffer as dirty. */
>         if (sctx->framebuffer.state.zsbuf) {
>                 struct pipe_surface *surf = sctx->framebuffer.state.zsbuf;
> --
> 1.9.1
>
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