[Mesa-dev] [PATCH 06/22] i965/fs/gen6: Use stencil indexing if stencil meta blit is active

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_wm.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index f9a39ad..c56688c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -392,7 +392,11 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
             key->compressed_multisample_layout_mask |= 1 << s;
          }
 
-         if (brw->gen < 8 && t->StencilSampling) {
+         if (brw->gen >= 8)
+            continue;
+
+         if (t->StencilSampling || (brw->meta_blit.is_active &&
+                                    brw->meta_blit.use_stencil_index_mode)) {
             key->num_w_tiled_samples[s] = intel_tex->mt->num_samples ?
                                           intel_tex->mt->num_samples : 1;
             key->w_tiled_base_level[s] = t->BaseLevel;
-- 
1.8.3.1