[Mesa-dev] [PATCH 04/13] i965/gen8: Allow stencil buffers to be configured as single sampled

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index cc55bd9..32d1c33 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -305,8 +305,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
 
    intel_miptree_used_for_rendering(mt);
 
-   /* Render targets can't use IMS layout. */
-   assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);
+   /* Render targets can't use IMS layout. Stencil in turn gets configured as
+    * single sampled and indexed manually by the program.
+    */
+   if (mt->format != MESA_FORMAT_S_UINT8)
+      assert(mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS);
 
    switch (gl_target) {
    case GL_TEXTURE_CUBE_MAP_ARRAY:
@@ -351,10 +354,12 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
    surf[3] = (depth - 1) << BRW_SURFACE_DEPTH_SHIFT |
              (pitch - 1); /* Surface Pitch */
 
-   surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) |
-             min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT |
+   surf[4] = min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT |
              (depth - 1) << GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT;
 
+   if (mt->format != MESA_FORMAT_S_UINT8)
+      surf[4] |= gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout);
+
    surf[5] = irb->mt_level - irb->mt->first_level;
 
    surf[6] = 0; /* Nothing of relevance. */
-- 
1.8.3.1