[Mesa-dev] [PATCH 3/4] i965/gen7 depth: Set depth size based on LOD0 for 3D textures

[Jordan Justen]

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Cc: Chris Forbes <chrisf at ijw.co.nz>
---
 src/mesa/drivers/dri/i965/gen7_misc_state.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c
index d8efa76..22911bf 100644
--- a/src/mesa/drivers/dri/i965/gen7_misc_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c
@@ -82,8 +82,8 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw,
       depth *= 6;
       break;
    case GL_TEXTURE_3D:
-      assert(rb);
-      depth = MAX2(rb->Depth, 1);
+      assert(mt);
+      depth = MAX2(mt->logical_depth0, 1);
       /* fallthrough */
    default:
       surftype = translate_tex_target(gl_target);
-- 
2.0.0.rc2