[Mesa-dev] [PATCH] radeonsi: use minnum and maxnum LLVM intrinsics for MIN and MAX opcodes

[Marek Olšák]

The R600 LLVM support for graphics is disabled by default and is
missing some features. Unless somebody implements the missing
features, discussing how each TGSI instruction is compiled is fairly
low priority. We should rather be asking whether that project is
really dead. It's sad but true.

For graphics, r600g is using its own optimizing shader backend.

Marek

On Sat, Nov 22, 2014 at 6:59 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
>
>> On Nov 22, 2014, at 7:35 AM, Marek Olšák <maraeo at gmail.com> wrote:
>>
>> AFAICS, the R600 backend doesn't implement the intrinsics for R600.
>>
>> Marek
>
>
> Should it? It’s trivial to switch to these for it, but I wasn’t sure what the actual semantics of its instructions were. There’s MAX and MAX_DX10, where I think MAX_DX10 corresponds to maxnum and MAX is the legacy version, but I’m not sure.
>
>
>>
>> On Sat, Nov 22, 2014 at 3:53 AM, Michel Dänzer <michel at daenzer.net> wrote:
>>> On 21.11.2014 06:21, Marek Olšák wrote:
>>>>
>>>> From: Marek Olšák <marek.olsak at amd.com>
>>>>
>>>> So far it has been compiled into pretty ugly code (8 instructions or so
>>>> for either opcode).
>>>> ---
>>>>  src/gallium/drivers/radeonsi/si_shader.c | 7 +++++++
>>>>  1 file changed, 7 insertions(+)
>>>>
>>>> diff --git a/src/gallium/drivers/radeonsi/si_shader.c
>>>> b/src/gallium/drivers/radeonsi/si_shader.c
>>>> index ee08d1a..973bac2 100644
>>>> --- a/src/gallium/drivers/radeonsi/si_shader.c
>>>> +++ b/src/gallium/drivers/radeonsi/si_shader.c
>>>> @@ -2792,6 +2792,13 @@ int si_shader_create(struct si_screen *sscreen,
>>>> struct si_shader *shader)
>>>>        bld_base->op_actions[TGSI_OPCODE_EMIT].emit = si_llvm_emit_vertex;
>>>>        bld_base->op_actions[TGSI_OPCODE_ENDPRIM].emit =
>>>> si_llvm_emit_primitive;
>>>>
>>>> +       if (HAVE_LLVM >= 0x0306) {
>>>> +               bld_base->op_actions[TGSI_OPCODE_MAX].emit =
>>>> build_tgsi_intrinsic_nomem;
>>>> +               bld_base->op_actions[TGSI_OPCODE_MAX].intr_name =
>>>> "llvm.maxnum.f32";
>>>> +               bld_base->op_actions[TGSI_OPCODE_MIN].emit =
>>>> build_tgsi_intrinsic_nomem;
>>>> +               bld_base->op_actions[TGSI_OPCODE_MIN].intr_name =
>>>> "llvm.minnum.f32";
>>>> +       }
>>>> +
>>>>        si_shader_ctx.radeon_bld.load_system_value = declare_system_value;
>>>>        si_shader_ctx.tokens = sel->tokens;
>>>>        tgsi_parse_init(&si_shader_ctx.parse, si_shader_ctx.tokens);
>>>>
>>>
>>> Shouldn't this be done in
>>> src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c, so it benefits r600g as
>>> well?
>>>
>>>
>>> --
>>> Earthling Michel Dänzer               |               http://www.amd.com
>>> Libre software enthusiast             |             Mesa and X developer
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>