[Mesa-dev] [WIP 17/25] i965/fs: Make generator to emit two instructions for double floats

[Topi Pohjolainen]

TODO: 3-src operations

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_eu_emit.c | 39 +++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 92f19e2..a5e3475 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -832,6 +832,37 @@ brw_next_insn(struct brw_compile *p, unsigned opcode)
    return insn;
 }
 
+static void
+brw_offset_double(struct brw_reg *reg)
+{
+   if (reg->file == BRW_GENERAL_REGISTER_FILE && reg->width)
+      ++reg->nr;
+}
+
+static brw_inst *
+brw_emit_double_2nd_half(struct brw_compile *p, unsigned opcode,
+                         struct brw_reg *dest,
+                         unsigned num_src,
+                         struct brw_reg *src0,
+                         struct brw_reg *src1)
+{
+   brw_inst *insn = next_insn(p, opcode);
+
+   ++dest->nr;
+   brw_set_dest(p, insn, *dest);
+   if (num_src > 0) {
+      brw_offset_double(src0);
+      brw_set_src0(p, insn, *src0);
+   }
+   if (num_src > 1) {
+      brw_offset_double(src1);
+      brw_set_src1(p, insn, *src1);
+   }
+   assert(num_src <= 2);
+
+   return insn;
+}
+
 static brw_inst *
 brw_alu1(struct brw_compile *p, unsigned opcode,
          struct brw_reg dest, struct brw_reg src)
@@ -839,6 +870,10 @@ brw_alu1(struct brw_compile *p, unsigned opcode,
    brw_inst *insn = next_insn(p, opcode);
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src);
+
+   if (dest.type == BRW_REGISTER_TYPE_DF)
+      insn = brw_emit_double_2nd_half(p, opcode, &dest, 1, &src, NULL);
+
    return insn;
 }
 
@@ -850,6 +885,10 @@ brw_alu2(struct brw_compile *p, unsigned opcode,
    brw_set_dest(p, insn, dest);
    brw_set_src0(p, insn, src0);
    brw_set_src1(p, insn, src1);
+
+   if (dest.type == BRW_REGISTER_TYPE_DF)
+      insn = brw_emit_double_2nd_half(p, opcode, &dest, 2, &src0, &src1);
+
    return insn;
 }
 
-- 
1.8.3.1