[Mesa-dev] [WIP 18/25] i965/fs: Generate two instructions for double precision comparison

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_eu_emit.c        | 6 ++++++
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 7 ++++---
 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index a5e3475..c58a4b6 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1905,6 +1905,12 @@ void brw_CMP(struct brw_compile *p,
          brw_inst_set_thread_control(brw, insn, BRW_THREAD_SWITCH);
       }
    }
+
+   if (dest.type == BRW_REGISTER_TYPE_DF) {
+      insn = brw_emit_double_2nd_half(p, BRW_OPCODE_CMP,
+                                      &dest, 2, &src0, &src1);
+      brw_inst_set_cond_modifier(brw, insn, conditional);
+   }
 }
 
 /***********************************************************************
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 0abcbeb..4bcb074 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -2126,9 +2126,10 @@ fs_generator::generate_code(const cfg_t *cfg)
       }
 
       if (inst->no_dd_clear || inst->no_dd_check || inst->conditional_mod) {
-         assert(p->next_insn_offset == last_insn_offset + 16 ||
-                !"conditional_mod, no_dd_check, or no_dd_clear set for IR "
-                 "emitting more than 1 instruction");
+         if (dst.type != BRW_REGISTER_TYPE_DF)
+            assert(p->next_insn_offset == last_insn_offset + 16 ||
+                   !"conditional_mod, no_dd_check, or no_dd_clear set for IR "
+                    "emitting more than 1 instruction");
 
          brw_inst *last = &p->store[last_insn_offset / 16];
 
-- 
1.8.3.1