[Mesa-dev] [PATCH 4/4] i965/vec4: Generate better code for ir_triop_csel.

[Matt Turner]

On Thu, Oct 16, 2014 at 9:01 AM, Ian Romanick <idr at freedesktop.org> wrote:
> On 10/15/2014 08:51 PM, Kenneth Graunke wrote:
>> Previously, we generated an extra CMP instruction:
>>
>>    cmp.ge.f0(8)    g6<1>D          g1<0,4,1>F      0F
>>    cmp.nz.f0(8)    null            g6<4,4,1>D      0D
>>    (+f0) sel(8)    g5<1>F          g1.4<0,4,1>F    g2<0,4,1>F
>>
>> The first operand is always a boolean, and we want to predicate the SEL
>> on that.  Rather than producing a boolean value and comparing it against
>> zero, we can just produce a condition code in the flag register.
>>
>> Now we generate:
>>
>>    cmp.ge.f0(8)    null            g1<0,4,1>F      0F
>>    (+f0) sel(8)    g5<1>F          g1.4<0,4,1>F    g2<0,4,1>F
>>
>> No difference in shader-db.
>
> Do any piglit tests generate ir_triop_csel for VS or GS?  The change is
> nearly identical to the FS change, but it would be nice to know any of
> it was exercised.

I expect ./generated_tests/spec/glsl-1.30/execution/built-in-functions/vs-mix-vec3-vec3-bvec3.shader_test
does.