[Mesa-dev] [PATCH 6/6] i965/fs: Implement SIMD16 carry/borrow on Gen 7.

Matt Turner mattst88 at gmail.com
Sun Sep 28 13:26:34 PDT 2014


---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 34 ++++++++++++++++++++--------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index ff1b533..adbf4b0 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -700,23 +700,37 @@ fs_visitor::visit(ir_expression *ir)
       emit_math(SHADER_OPCODE_INT_QUOTIENT, this->result, op[0], op[1]);
       break;
    case ir_binop_carry: {
-      if (brw->gen == 7)
-         no16("SIMD16 explicit accumulator operands unsupported\n");
-
       struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
 
-      emit(ADDC(reg_null_ud, op[0], op[1]));
-      emit(MOV(this->result, fs_reg(acc)));
+      fs_inst *addc = emit(ADDC(reg_null_ud, op[0], op[1]));
+      fs_inst *mov = emit(MOV(this->result, fs_reg(acc)));
+
+      if (brw->gen == 7 && dispatch_width == 16) {
+         addc->force_uncompressed = true;
+         mov->force_uncompressed = true;
+
+         addc = emit(ADDC(reg_null_ud, half(op[0], 1), half(op[1], 1)));
+         addc->force_sechalf = true;
+         mov = emit(MOV(half(this->result, 1), half(fs_reg(acc), 1)));
+         mov->force_sechalf = true;
+      }
       break;
    }
    case ir_binop_borrow: {
-      if (brw->gen == 7)
-         no16("SIMD16 explicit accumulator operands unsupported\n");
-
       struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
 
-      emit(SUBB(reg_null_ud, op[0], op[1]));
-      emit(MOV(this->result, fs_reg(acc)));
+      fs_inst *subb = emit(SUBB(reg_null_ud, op[0], op[1]));
+      fs_inst *mov = emit(MOV(this->result, fs_reg(acc)));
+
+      if (brw->gen == 7 && dispatch_width == 16) {
+         subb->force_uncompressed = true;
+         mov->force_uncompressed = true;
+
+         subb = emit(SUBB(reg_null_ud, half(op[0], 1), half(op[1], 1)));
+         subb->force_sechalf = true;
+         mov = emit(MOV(half(this->result, 1), half(fs_reg(acc), 1)));
+         mov->force_sechalf = true;
+      }
       break;
    }
    case ir_binop_mod:
-- 
1.8.5.5



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