[Mesa-dev] [PATCH 2/2] i965/bsw: Enabling floating point blend optimization

Ben Widawsky benjamin.widawsky at intel.com
Fri Apr 10 15:52:54 PDT 2015


Same as previous, but for BSW.

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 src/mesa/drivers/dri/i965/brw_state_upload.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 11098cf..ec6c4e6 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -355,6 +355,13 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
                 GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC          |
                 GEN9_FLOAT_BLEND_OPTMIZATION_ENABLE);
       ADVANCE_BATCH();
+   } else if (brw->is_cherryview) {
+      BEGIN_BATCH(3);
+      OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
+      OUT_BATCH(GEN7_CACHE_MODE_1);
+      OUT_BATCH((GEN9_FLOAT_BLEND_OPTMIZATION_ENABLE << 16) |
+                GEN9_FLOAT_BLEND_OPTMIZATION_ENABLE);
+      ADVANCE_BATCH();
    }
 
    if (brw->gen >= 8) {
-- 
2.3.5



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