[Mesa-dev] [RFC] nir: compiler options for addressing modes

[Kenneth Graunke]

On Tuesday, April 14, 2015 12:32:47 PM Jason Ekstrand wrote:
> On Tue, Apr 14, 2015 at 11:54 AM, Rob Clark <robdclark at gmail.com> wrote:
> > On Tue, Apr 14, 2015 at 1:56 PM, Eric Anholt <eric at anholt.net> wrote:
[snip]
> >> This seems like a good idea, as it'll mean we can have passes that do
> >> things like scalarizing uniform loads, which I think could be productive
> >> for us.
> >>
> >> However, I find the "register" size name confusing -- it seems you mean
> >> a channel in a register, while on both the pieces of hardware I've
> >> worked on recently, a register is 16 dwords wide.  I think I'd call it
> >> "dword" or "float", with a slight preference for dword.
> >
> > yeah, I was having trouble picking a good name for that one.. I'd
> > originally had float, but that sounds funny when it could just as
> > easily be uint.  (And also, I have half-precision registers that would
> > be nice to use some day, etc.)  I think "dword" is a better
> > alternative.
> 
> I'm not sure what I think of this.  However, having things better
> defined is a good idea and this may be a step in the right direction.
> 
> Yes, please use either dword or float for 32-bits.  Also, what is this
> addressing_mode_none?  If we want a vec4 addressing mode, we should
> just call it vec4.

Using "vec1" for dword and "vec4" for 4-dwords might not be bad either.
Otherwise, "dword" seems fine...

--Ken
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