[Mesa-dev] [PATCH 05/10] i965/fs: Set compression only if writing two registers.

[Jason Ekstrand]

On Tue, Apr 14, 2015 at 4:15 PM, Matt Turner <mattst88 at gmail.com> wrote:
> We don't want to set compression control on a SIMD16 instruction
> operating on words or smaller.

PRM/bspec quote please

> ---
>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> index 102923a..b824dd3 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> @@ -1620,7 +1620,10 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
>           break;
>        case 16:
>        case 32:
> -         brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
> +         if (type_sz(inst->dst.type) < sizeof(float))
> +            brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
> +         else
> +            brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
>           break;
>        default:
>           unreachable("Invalid instruction width");
> --
> 2.0.5
>
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