[Mesa-dev] [PATCH V2 00/23] i965/skl: Add YF/YS tiling support

[Anuj Phogat]

This series enables skl+ to read/write data to YF/YF tiled
surfaces. A big thanks to Kristian for discussing problems
I faced in writing these patches.

Many piglit tests for texture/buffer data read/write
pass with the new tiling formats. But we still have piglit
regressions in tests using 2D_ARRAY, 3D and multisample
textures. So, I'm keeping the new tiling formats disabled
in this series. It'll useful to get some review comments
while I work on fixing the regressions.

V2:
 - Fixed reading/writing to miptree levels > 0 in Yf/Ys tiled
   texture. 
 - Rebased the series on top of master.
 - Moved the tile size computation (using width, height, cpp)
   for Yf/Ys tiling out of drm in to mesa.
 - Fixed few piglit regressions on older (< gen9) platforms.

Patches are available at:
https://github.com/aphogat/drm.git, branch: tiling-yf-ys
https://github.com/aphogat/mesa.git, branch: tiling-yf-ys

Jenkins shows no regressions with this series.

Note: I have enabled the Yf/Ys tiling on my 'tiling-yf-ys'
branch for testing. My drm patches posted on intel-gfx are
required to test this series. They are not required to build.

Anuj Phogat (22):
  meta: Enable _mesa_meta_pbo_GetTexSubImage() to read in to non-pbo
    buffers
  i965: Choose tiling in brw_miptree_layout() function
  i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c
  i965: Create a helper function intel_miptree_total_width_height()
  i965: Pass miptree pointer as function parameter in
    intel_vertical_texture_alignment_unit
  i965/gen9: Set tiled resource mode for the miptree
  i965/gen9: Set horizontal alignment for the miptree
  i965/gen9: Use HALIGN_16 if MCS is enabled
  i965/gen9: Set vertical alignment for the miptree
  i965/gen9: Allocate YF/YS tiled buffer objects
  i965/gen9: Set tiled resource mode in surface state
  i965: Rename use_linear_1d_layout() and make it global
  i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*
  i965/gen9: Set vertical and horizontal surface alignments
  i965/gen9: Use _mesa_meta_pbo_TexSubImage to write to YF/YS surfaces
  i965/gen9: Use _mesa_meta_pbo_GetTexSubImage() to read YF/YS surfaces
  i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()
  i965/skl: Modify the conditions to use blitter on skl+
  i965/gen9: Use blitter as fallback path to write to YF/YS surfaces
  i965/gen9: Use blitter as fallback path to read YF/YS surfaces
  i965/gen9: Plugin the code for selecting YF/YS tiling on skl+
  i965/gen9: Disable Mip Tail for YF/YS tiled surfaces

 src/mesa/drivers/common/meta.h                 |   1 +
 src/mesa/drivers/common/meta_tex_subimage.c    |  43 ++-
 src/mesa/drivers/dri/i965/brw_context.h        |   4 +
 src/mesa/drivers/dri/i965/brw_defines.h        |   9 +
 src/mesa/drivers/dri/i965/brw_tex_layout.c     | 451 ++++++++++++++++++++++---
 src/mesa/drivers/dri/i965/gen8_surface_state.c |  77 ++++-
 src/mesa/drivers/dri/i965/intel_blit.c         | 292 +++++++++++++---
 src/mesa/drivers/dri/i965/intel_blit.h         |   3 +
 src/mesa/drivers/dri/i965/intel_copy_image.c   |   3 +
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c  | 232 ++++++-------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h  |  17 +-
 src/mesa/drivers/dri/i965/intel_pixel_read.c   |  21 +-
 src/mesa/drivers/dri/i965/intel_reg.h          |  33 ++
 src/mesa/drivers/dri/i965/intel_tex_image.c    |  36 +-
 src/mesa/drivers/dri/i965/intel_tex_subimage.c |  16 +-
 15 files changed, 995 insertions(+), 243 deletions(-)

-- 
2.3.4