[Mesa-dev] [PATCH 01/23] i965: Remove the context parameter from brw_texture_offset

[Jason Ekstrand]

It wasn't really being used anyway.  We used it to assert that gpu_shader5
is supported in the back-end but that should be caught by the front-end.

Signed-off-by: Jason Ekstrand <jason.ekstrand at intel.com>
---
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp       | 2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 2 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp       | 8 +-------
 src/mesa/drivers/dri/i965/brw_shader.h         | 3 +--
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +-
 5 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 3972581..6d4f196 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1708,7 +1708,7 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr)
    for (unsigned i = 0; i < 3; i++) {
       if (instr->const_offset[i] != 0) {
          assert(offset_components == 0);
-         tex_offset = fs_reg(brw_texture_offset(ctx, instr->const_offset, 3));
+         tex_offset = fs_reg(brw_texture_offset(instr->const_offset, 3));
          break;
       }
    }
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 4e99366..a99b12ef 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2353,7 +2353,7 @@ fs_visitor::visit(ir_texture *ir)
           * offset, and a non-constant offset.
           */
          offset_value =
-            fs_reg(brw_texture_offset(ctx, const_offset->value.i,
+            fs_reg(brw_texture_offset(const_offset->value.i,
                                       const_offset->type->vector_elements));
       } else {
          ir->offset->accept(this);
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 0d6ac0c..dd61fb4 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -393,14 +393,8 @@ brw_math_function(enum opcode op)
 }
 
 uint32_t
-brw_texture_offset(struct gl_context *ctx, int *offsets,
-                   unsigned num_components)
+brw_texture_offset(int *offsets, unsigned num_components)
 {
-   /* If the driver does not support GL_ARB_gpu_shader5, the offset
-    * must be constant.
-    */
-   assert(offsets != NULL || ctx->Extensions.ARB_gpu_shader5);
-
    if (!offsets) return 0;  /* nonconstant offset; caller will handle it. */
 
    /* Combine all three offsets into a single unsigned dword:
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 8a3263e..e6246ed 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -206,8 +206,7 @@ public:
    virtual void invalidate_live_intervals() = 0;
 };
 
-uint32_t brw_texture_offset(struct gl_context *ctx, int *offsets,
-                            unsigned num_components);
+uint32_t brw_texture_offset(int *offsets, unsigned num_components);
 
 #endif /* __cplusplus */
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 3d16caa..20e6109 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2630,7 +2630,7 @@ vec4_visitor::visit(ir_texture *ir)
 
    if (ir->offset != NULL && !has_nonconstant_offset) {
       inst->offset =
-         brw_texture_offset(ctx, ir->offset->as_constant()->value.i,
+         brw_texture_offset(ir->offset->as_constant()->value.i,
                             ir->offset->type->vector_elements);
    }
 
-- 
2.3.5