[Mesa-dev] [PATCH 12/18] i965: Pass texture target as parameter for surface setup
Topi Pohjolainen
topi.pohjolainen at intel.com
Wed Apr 22 13:47:32 PDT 2015
Also changed a couple of direct shifts into SET_FIELD().
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 +++++++-----
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 11 +++++------
src/mesa/drivers/dri/i965/gen8_surface_state.c | 13 +++++--------
4 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index bb375df..b90d329 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -967,7 +967,7 @@ struct brw_context
struct gl_texture_object *tObj,
uint32_t tex_format,
bool is_integer_format,
- uint32_t effective_depth,
+ GLenum target, uint32_t effective_depth,
int swizzle, uint32_t *surf_offset,
bool for_gather);
uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index ad03ffe..f7acad4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -313,6 +313,7 @@ brw_update_texture_surface(struct brw_context *brw,
struct gl_texture_object *tObj,
uint32_t tex_format,
bool is_integer_format /* unused */,
+ GLenum target,
uint32_t effective_depth /* unused */,
int swizzle /* unused */,
uint32_t *surf_offset,
@@ -353,10 +354,10 @@ brw_update_texture_surface(struct brw_context *brw,
}
}
- surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
- BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
- BRW_SURFACE_CUBEFACE_ENABLES |
- tex_format << BRW_SURFACE_FORMAT_SHIFT);
+ surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) |
+ BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
+ BRW_SURFACE_CUBEFACE_ENABLES |
+ tex_format << BRW_SURFACE_FORMAT_SHIFT;
surf[1] = mt->bo->offset64 + mt->offset; /* reloc */
@@ -834,7 +835,8 @@ update_texture_surface(struct gl_context *ctx,
? tObj->NumLayers : mt->logical_depth0;
brw->vtbl.update_texture_surface(brw, mt, tObj, tex_format,
- tObj->_IsIntegerFormat, effective_depth,
+ tObj->_IsIntegerFormat, tObj->Target,
+ effective_depth,
swizzle, surf_offset, for_gather);
}
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 005b4eb..b87680b 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -268,7 +268,7 @@ gen7_update_texture_surface(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
struct gl_texture_object *tObj,
uint32_t tex_format, bool is_integer_format,
- uint32_t effective_depth,
+ GLenum target, uint32_t effective_depth,
int swizzle, uint32_t *surf_offset,
bool for_gather)
{
@@ -281,12 +281,12 @@ gen7_update_texture_surface(struct brw_context *brw,
if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
- surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
- tex_format << BRW_SURFACE_FORMAT_SHIFT |
+ surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) |
+ SET_FIELD(tex_format, BRW_SURFACE_FORMAT) |
gen7_surface_tiling_mode(mt->tiling);
/* mask of faces present in cube map; for other surfaces MBZ. */
- if (tObj->Target == GL_TEXTURE_CUBE_MAP || tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY)
+ if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY)
surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
if (mt->align_h == 4)
@@ -294,8 +294,7 @@ gen7_update_texture_surface(struct brw_context *brw,
if (mt->align_w == 8)
surf[0] |= GEN7_SURFACE_HALIGN_8;
- if (_mesa_is_array_texture(tObj->Target) ||
- tObj->Target == GL_TEXTURE_CUBE_MAP)
+ if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP)
surf[0] |= GEN7_SURFACE_IS_ARRAY;
if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index feed343..9df66e7 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -155,7 +155,7 @@ gen8_update_texture_surface(struct brw_context *brw,
struct gl_texture_object *tObj,
uint32_t tex_format,
bool is_integer_format /* unused */,
- uint32_t effective_depth,
+ GLenum target, uint32_t effective_depth,
int swizzle, uint32_t *surf_offset,
bool for_gather)
{
@@ -180,19 +180,16 @@ gen8_update_texture_surface(struct brw_context *brw,
uint32_t *surf = allocate_surface_state(brw, surf_offset);
- surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
- tex_format << BRW_SURFACE_FORMAT_SHIFT |
+ surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) |
+ SET_FIELD(tex_format, BRW_SURFACE_FORMAT) |
vertical_alignment(mt) |
horizontal_alignment(mt) |
tiling_mode;
- if (tObj->Target == GL_TEXTURE_CUBE_MAP ||
- tObj->Target == GL_TEXTURE_CUBE_MAP_ARRAY) {
+ if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY)
surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
- }
- if (_mesa_is_array_texture(tObj->Target) ||
- tObj->Target == GL_TEXTURE_CUBE_MAP)
+ if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP)
surf[0] |= GEN8_SURFACE_IS_ARRAY;
surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt->qpitch >> 2;
--
1.9.3
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