[Mesa-dev] [PATCH 09/14] i965/gen6: Add support for setting minimum layer for tex surfaces

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index ad5ddb5..c006762 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -314,7 +314,7 @@ brw_update_texture_surface(struct brw_context *brw,
                            bool is_integer_format /* unused */,
                            GLenum target,
                            uint32_t effective_depth /* unused */,
-                           uint32_t min_layer /* unused */,
+                           uint32_t min_layer,
                            uint32_t min_lod, uint32_t mip_count, 
                            int swizzle /* unused */,
                            uint32_t *surf_offset,
@@ -372,6 +372,9 @@ brw_update_texture_surface(struct brw_context *brw,
    surf[4] = brw_get_surface_num_multisamples(mt->num_samples) |
              SET_FIELD(min_lod, BRW_SURFACE_MIN_LOD);
 
+   if (brw->gen == 6)
+      surf[4] |= SET_FIELD(min_layer, BRW_SURFACE_MIN_ARRAY_ELEMENT);
+
    surf[5] = mt->align_h == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0;
 
    /* Emit relocation to surface contents */
-- 
1.9.3